<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/66531>66531</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [GlobalISel] Dead registers without register class
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            llvm:globalisel
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          e-kud
      </td>
    </tr>
</table>

<pre>
    The original discussion is here: https://reviews.llvm.org/D157458?vs=on&id=548421#4578625

If we try to compile the following code with `global-isel=1` then we will see a failed assert https://godbolt.org/z/K3zzaKzna
```
  define i64 @f(i64 %0, i64 %1) {
  entry:
    %2 = lshr i64 %0, %1
    %3 = add i64 %2, 123456789
    ret i64 %3
  }
```
```
# *** IR Dump After RegBankSelect (regbankselect) ***:
# Machine code for function f: IsSSA, TracksLiveness, Legalized, RegBankSelected
Function Live Ins: $rdi, $rsi

bb.1.entry:
  liveins: $rdi, $rsi
  %0:gpr(s64) = COPY $rdi
  %1:gpr(s64) = COPY $rsi
  %3:gpr(s64) = G_CONSTANT i64 123456789
  %5:gpr(s8) = G_TRUNC %1:gpr(s64)
  %2:gpr(s64) = G_LSHR %0:gpr, %5:gpr(s8)
  %4:gpr(s64) = G_ADD %2:gpr, %3:gpr
  $rax = COPY %4:gpr(s64)
  RET 0, implicit $rax

# End machine code for function f.

Selecting function: f
...
Selecting: 
  %3:gpr(s64) = G_CONSTANT i64 123456789
Is dead; erasing.
...

# *** IR Dump After InstructionSelect (instruction-select) ***:
# Machine code for function f: IsSSA, TracksLiveness, Legalized, RegBankSelected, Selected
Function Live Ins: $rdi, $rsi

bb.1.entry:
  liveins: $rdi, $rsi
  %0:gr64 = COPY $rdi
  %1:gr64_with_sub_8bit = COPY $rsi
  %5:gr8 = COPY %1.sub_8bit:gr64_with_sub_8bit
  $cl = COPY %5:gr8
  %2:gr64 = SHR64rCL %0:gr64(tied-def 0), implicit-def dead $eflags, implicit $cl
  %4:gr64 = ADD64ri32 %2:gr64(tied-def 0), 123456789, implicit-def dead $eflags
  $rax = COPY %4:gr64
  RET 0, implicit $rax

# End machine code for function f.

llc: /root/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:664: const llvm::TargetRegisterClass* llvm::MachineRegisterInfo::getRegClass(llvm::Register) const: Assertion `isa<const TargetRegisterClass *>(VRegInfo[Reg.id()].first) && "Register class not set, wrong accessor"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/llc -o /app/output.s -x86-asm-syntax=intel -global-isel=1 -O0 -print-after=regbankselect --print-after=instruction-select <source>
1.      Running pass 'Function Pass Manager' on module '<source>'.
2.      Running pass 'Fast Tile Register Preconfigure' on function '@f'
 #0 0x00000000033b4f68 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x33b4f68)
 #1 0x00000000033b269c SignalHandler(int) Signals.cpp:0:0
 #2 0x00007f95150ee420 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14420)
 #3 0x00007f9514bb100b raise (/lib/x86_64-linux-gnu/libc.so.6+0x4300b)
 #4 0x00007f9514b90859 abort (/lib/x86_64-linux-gnu/libc.so.6+0x22859)
 #5 0x00007f9514b90729 (/lib/x86_64-linux-gnu/libc.so.6+0x22729)
 #6 0x00007f9514ba1fd6 (/lib/x86_64-linux-gnu/libc.so.6+0x33fd6)
 #7 0x0000000001b313ee (anonymous namespace)::X86FastPreTileConfig::runOnMachineFunction(llvm::MachineFunction&) X86FastPreTileConfig.cpp:0:0
 #8 0x000000000269d0a9 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) MachineFunctionPass.cpp:0:0
 #9 0x0000000002c18a99 llvm::FPPassManager::runOnFunction(llvm::Function&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2c18a99)
#10 0x0000000002c18cd1 llvm::FPPassManager::runOnModule(llvm::Module&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2c18cd1)
#11 0x0000000002c194f2 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2c194f2)
#12 0x000000000075f1e2 compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
#13 0x000000000069e7e6 main (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x69e7e6)
#14 0x00007f9514b92083 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x24083)
#15 0x0000000000755b7e _start (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x755b7e)
Program terminated with signal: SIGSEGV
Compiler returned: 139
```

This leads us to https://github.com/llvm/llvm-project/commit/931904d7772b18210d7166ed657176ae91ad11d8, where dead instruction elimination was introduced. Such elimination doesn't assign any register class to a virtual register as assignment happens during selection. As a result, we may have virtual registers with `RegisterBank` instead of `TargetRegisterClass` after instruction selection.

The behavior was revealed in `X86PreTileConfigPass` as it iterates all virtual registers and tries to get a class for each of them.

CC @arsenm 
</pre>
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