<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/65320>65320</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Lacking `f16c` and `avx512fp16` CPU feature strings for half-precision SIMDs
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          ashvardanian
      </td>
    </tr>
</table>

<pre>
    GCC conveniently provides the [`__builtin_cpu_supports("f16c")` and `__builtin_cpu_supports("avx512fp16")` used here](https://github.com/unum-cloud/usearch/blob/d718d7b4073a389837a8e4d849bdbc9017962a6d/include/usearch/index_plugins.hpp#L225), to detect the availability of half-precision `float16` SIMD-instructions in x86 CPUs of the AVX2 and AVX-512 generations. Assuming this functionality is becoming more important in rising AI applications, achieving parity with recent GCC versions would be great.

For now, I've [switched to inline Assembly to support a broader range of compilers](https://github.com/unum-cloud/usearch/blob/c872160b031b7e7bf869c6340e78afe21b999f18/include/usearch/index_plugins.hpp#L223). I'm ready to help patch Clang if more people face the issue.
</pre>
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