<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/65062>65062</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Machine LICM Div-by-zero issue
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          ShucaiYao
      </td>
    </tr>
</table>

<pre>
    Hi, I found one bug on ARM when Machine LICM does hoisting:

``` // test.cpp
void foo();
void test(int N, int a) {
  for (int i = 0; i < N; ++i) {
    int b = (a > 2) ? (N / (a / 2)) : i;
    if (b == 128) {
      foo();
    }
 }
}
```

Commands:

```
clang++ -c test.cpp --target=aarch64 -S -O2 -o -
clang version 18.0.0 (https://github.com/llvm/llvm-project.git a88732d98b0ccdb57c82635a3b97badd9755f99b)
```

MIR after Machine LICM

```
bb.1.for.body.lr.ph:
; predecessors: %bb.0
 successors: %bb.3(0x80000000); %bb.3(100.00%)

  %9:gpr32 = UBFMWri %6:gpr32common, 1, 31
  %10:gpr32all = COPY $wzr
  %8:gpr32all = COPY %10:gpr32all
  %0:gpr32 = COPY %9:gpr32
  %12:gpr32 = SDIVWr %5:gpr32common, %0:gpr32
  B %bb.3

bb.2.for.cond.cleanup:
; predecessors: %bb.0, %bb.7

  RET_ReallyLR

bb.3.for.body:
; predecessors: %bb.1, %bb.7
  successors: %bb.4(0x40000000), %bb.5(0x40000000); %bb.4(50.00%), %bb.5(50.00%)

  %1:gpr32sp = PHI %8:gpr32all, %bb.1, %4:gpr32all, %bb.7
  %11:gpr32 = SUBSWri %6:gpr32common, 3, 0, implicit-def $nzcv
  Bcc 11, %bb.5, implicit $nzcv
  B %bb.4

bb.4.cond.true:
; predecessors: %bb.3
 successors: %bb.5(0x80000000); %bb.5(100.00%)

  %2:gpr32all = COPY %12:gpr32

``` 

Please let me know if this is a bug or not. And if so, I would like to solve it. I found some fixups in SCEV. 

Any suggestions are welcome. 
</pre>
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