<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/64793>64793</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Code that is optimized on x86 but not AArch64
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          ZY546
      </td>
    </tr>
</table>

<pre>
    Hello, I noticed that for the following test case, there are 6 `add` or `sub` on x86, while 7 on AArch64.
https://godbolt.org/z/j3bWGKPhv
```c
extern int var_12;
extern int var_13;
extern int var_18;

void test(int var_2, int var_5, int var_6, int var_8, int var_9, int var_11) {

 
 var_13 = var_9 - (var_6 + var_8 + var_2);

    var_18 = var_5 + var_11;
    var_12 = var_8 + var_5 + var_11 + var_6;
}
```
x86:
```asm
test(int, int, int, int, int, int): # @test(int, int, int, int, int, int)
        add edi, edx
        add     edi, ecx
        sub     r8d, edi
 mov     rax, qword ptr [rip + var_13@GOTPCREL]
        mov     dword ptr [rax], r8d
        add     esi, r9d
        mov     rax, qword ptr [rip + var_18@GOTPCREL]
        mov     dword ptr [rax], esi
        add ecx, edx
        add     ecx, esi
        mov     rax, qword ptr [rip + var_12@GOTPCREL]
        mov     dword ptr [rax], ecx
 ret
```
AArch64:
```asm
test(int, int, int, int, int, int): // @test(int, int, int, int, int, int)
        add w8, w2, w0
        sub     w9, w4, w3
        add     w11, w3, w2
 add     w12, w1, w5
        sub     w8, w9, w8
        adrp    x9, :got:var_13
        adrp    x10, :got:var_18
        add     w11, w11, w12
        adrp    x12, :got:var_12
        add     w13, w5, w1
 ldr     x9, [x9, :got_lo12:var_13]
        ldr     x10, [x10, :got_lo12:var_18]
        ldr     x12, [x12, :got_lo12:var_12]
 str     w8, [x9]
        str     w13, [x10]
        str     w11, [x12]
        ret
```

Is this an optimization missed by the AArch64 backend? 
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJysVlGP4jYQ_jXOy2hRMk5C8pAHWMr11Eo9VZWq9uXkxIb4GmJqG8Ldr68chwABtq1u0Spm-L6Z-T7b8ZoZI7etEAVJliRZBexga6WLP_9I4jQoFf9a_CiaRhF8hY_QKisrwcHWzMJGabC1gI1qGtXJdgtWGAsVM8KxbS20AKYFpEDSkHFO0hCUdoE5lH3QwilLHbmrZSNg7n5ZLHRVp_GMhCsSLmpr94bQBcE1wfVW8VI1dqb0luD6G8H1F1r-_uGnT_XR00ka-r_Kx-JkhW5BthaOTH-OkNDlY4Q-RbIR8c-jkry3SjA7k9CZOAfJdZBeB9l1kF8HUUQwBzK_6QTD4AUCoSufCC9AMOurA8GlLz1-Q4L5RDIADF7GIsnIj6KRPfJw5F3qXmeMX9NLp_lqsgY-dCtMFxOImZ3_5TKPw2y8PeSELoAgBRKH_zt1tOg-jHMQXDpY8NM95j5nvJrg5lD2o864z5cDvlNHD7CTA_7ulOawtxpIstRyf5lASuLwwy-_fXr99YefSbK6LX-uwm_S2ckR8bXv-liu6eXqnD-u96-qsu9Q5ZrfT3B1enuCB3ya-58V4_coHpdVC_tw6w5H0btvX3eUvc8O7voTpeuPny58vEu7_qDp4v5JHy9E586fHvblPOmC-gaekzxp46X4Ztm0jd678dSjhC62yhK6GF6Fx9QovOfelb1Vfx7wWUm8L3nHPZekg1lv3JMaruHKR7K8NvS5Ue7_y9nVdDeOuYOxZHlj8SY7eyMbx2x8ko2XbGP11eJ4wdPSI8dbHoQ9Z0VXAqasZ2-Sf340YGtpgLWg9lbu5DdmpWphJ40RHMqv_X1ieOugZNVfouWEriHgBeU5zVkgiijNkSbRPI2DuuBVsslFvsmSeTzn8yxKWZVmGyzjPMo5F4EsMEQaZlEW5jHG8SzDOGfZhiFmLA1ZQuJQ7JhsZk1z3LmLRSCNOYgijec5DRpWisb0dyPEVnTQgwSd80AXLuelPGwNicNGGmsuVay0jSheFRf-tiTN2bPgw8UHyoN1V6qz4-Cgm2Jy4ZG2PpSzSu0Irl3tYXjZa_VFVJbguldkCK57xf8EAAD___MGpMU">