<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/64389>64389</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Backport 2a5e3f4c6c2cdd2aab55fbfdb703ca8163351ea9 to llvm 17
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            release:backport
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          topperc
      </td>
    </tr>
</table>

<pre>
    This patch works around what appears to be a CPUID bug in some Sandy Bridge CPUs. That will cause avxvnniint16 to be incorrectly enabled with -march=native on those CPUs.

Patch description:

    Don't access leaf 7 subleaf 1 unless subleaf 0 says it is
    supported via EAX.
    
    Intel documentation says invalid subleaves return 0. We had been
    relying on that behavior instead of checking the max sublef number.
    
    It appears that some Sandy Bridge CPUs return at least the subleaf 0
    EDX value for subleaf 1. Best guess is that this is a bug in a
    microcode patch since all of the bits we're seeing set in EDX were
    introduced after Sandy Bridge was originally released.
</pre>
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