<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/64271>64271</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [mlir] `VectorShuffleOpConvert::matchAndRewrite` crashed with assertion failure `idx < size()`
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          Colloportus0
      </td>
    </tr>
</table>

<pre>
    MLIR built at commit  b4c54b20
Reproduced with:  
`mlir-opt --convert-vector-to-spirv temp.mlir`

temp.mlir:
``` milr 

  func.func nested @func1(%arg0: tensor<9xi64>, %arg1: i1, %arg2: i16) -> tensor<?xi16> {
 %c959383518_i32 = arith.constant 959383518 : i32
    %c13 = arith.constant 13 : index
    %c15 = arith.constant 15 : index
    %c19 = arith.constant 19 : index
    %c26 = arith.constant 26 : index
    %c28 = arith.constant 28 : index
    %29 = index.divu %c15, %c13
    %35 = vector.broadcast %c959383518_i32 : i32 to vector<8xi32>
    %44 = affine.max affine_map<(d0) -> (d0 * 8)>(%c28)
    %62 = vector.matrix_multiply %35, %35 {lhs_columns = 8 : i32, lhs_rows = 1 : i32, rhs_columns = 1 : i32} : (vector<8xi32>, vector<8xi32>) -> vector<1xi32>
 %70 = scf.index_switch %44 -> memref<?xi1> 
    case 1 {
      %127 = index.ceildivs %44, %c26
      memref.alloca_scope  {
        %158 = vector.shuffle %62, %35 [0, 2, 3] : vector<1xi32>, vector<8xi32>
 }
      %alloc_39 = memref.alloc(%127) : memref<?xi1>
      scf.yield %alloc_39 : memref<?xi1>
    }
    default {
      %alloc_38 = memref.alloc(%29) : memref<?xi1>
      scf.yield %alloc_38 : memref<?xi1>
    }
    %126 = tensor.empty(%c19) : tensor<?xi16>
 return %126 : tensor<?xi16>
  }
```
 
trace:
```console
Assertion failed: (idx < size()), function operator[], file SmallVector.h, line 294.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: mlir-opt --convert-vector-to-spirv temp.mlir
 #0 0x00000001049bc548 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/workspace/build/bin/mlir-opt+0x1002f8548)
 #1 0x00000001049ba7e4 llvm::sys::RunSignalHandlers() (/workspace/build/bin/mlir-opt+0x1002f67e4)
 #2 0x00000001049bcbf4 SignalHandler(int) (/workspace/build/bin/mlir-opt+0x1002f8bf4)
 #3 0x00000001a46cd4c4 (/usr/lib/system/libsystem_platform.dylib+0x1803414c4)
 #4 0x00000001a46b5ee0 (/usr/lib/system/libsystem_pthread.dylib+0x180329ee0)
 #5 0x00000001a45f0340 (/usr/lib/system/libsystem_c.dylib+0x180264340)
 #6 0x00000001a45ef754 (/usr/lib/system/libsystem_c.dylib+0x180263754)
 #7 0x0000000108ebb990 (anonymous namespace)::VectorShuffleOpConvert::matchAndRewrite(mlir::vector::ShuffleOp, mlir::vector::ShuffleOpAdaptor, mlir::ConversionPatternRewriter&) const (.cold.10) (/workspace/build/bin/mlir-opt+0x1047f7990)
 #8 0x0000000106b000cc (anonymous namespace)::VectorShuffleOpConvert::matchAndRewrite(mlir::vector::ShuffleOp, mlir::vector::ShuffleOpAdaptor, mlir::ConversionPatternRewriter&) const (/workspace/build/bin/mlir-opt+0x10243c0cc)
 #9 0x0000000106aff938 mlir::OpConversionPattern<mlir::vector::ShuffleOp>::matchAndRewrite(mlir::Operation*, llvm::ArrayRef<mlir::Value>, mlir::ConversionPatternRewriter&) const (/workspace/build/bin/mlir-opt+0x10243b938)
#10 0x000000010708ae44 mlir::ConversionPattern::matchAndRewrite(mlir::Operation*, mlir::PatternRewriter&) const (/workspace/build/bin/mlir-opt+0x1029c6e44)
#11 0x000000010865fb74 mlir::PatternApplicator::matchAndRewrite(mlir::Operation*, mlir::PatternRewriter&, llvm::function_ref<bool (mlir::Pattern const&)>, llvm::function_ref<void (mlir::Pattern const&)>, llvm::function_ref<mlir::LogicalResult (mlir::Pattern const&)>)::$_2::operator()() const (/workspace/build/bin/mlir-opt+0x103f9bb74)
#12 0x000000010865ce70 mlir::PatternApplicator::matchAndRewrite(mlir::Operation*, mlir::PatternRewriter&, llvm::function_ref<bool (mlir::Pattern const&)>, llvm::function_ref<void (mlir::Pattern const&)>, llvm::function_ref<mlir::LogicalResult (mlir::Pattern const&)>) (/workspace/build/bin/mlir-opt+0x103f98e70)
#13 0x00000001070968a8 (anonymous namespace)::OperationLegalizer::legalize(mlir::Operation*, mlir::ConversionPatternRewriter&) (/workspace/build/bin/mlir-opt+0x1029d28a8)
#14 0x000000010708edac (anonymous namespace)::OperationConverter::convertOperations(llvm::ArrayRef<mlir::Operation*>, llvm::function_ref<void (mlir::Diagnostic&)>) (/workspace/build/bin/mlir-opt+0x1029cadac)
#15 0x0000000107090f00 mlir::applyPartialConversion(mlir::Operation*, mlir::ConversionTarget&, mlir::FrozenRewritePatternSet const&, llvm::DenseSet<mlir::Operation*, llvm::DenseMapInfo<mlir::Operation*, void>>*) (/workspace/build/bin/mlir-opt+0x1029ccf00)
#16 0x0000000106b02580 (anonymous namespace)::ConvertVectorToSPIRVPass::runOnOperation() (/workspace/build/bin/mlir-opt+0x10243e580)
#17 0x0000000107045e34 mlir::detail::OpToOpPassAdaptor::run(mlir::Pass*, mlir::Operation*, mlir::AnalysisManager, bool, unsigned int) (/workspace/build/bin/mlir-opt+0x102981e34)
#18 0x0000000107046524 mlir::detail::OpToOpPassAdaptor::runPipeline(mlir::OpPassManager&, mlir::Operation*, mlir::AnalysisManager, bool, unsigned int, mlir::PassInstrumentor*, mlir::PassInstrumentation::PipelineParentInfo const*) (/workspace/build/bin/mlir-opt+0x102982524)
#19 0x00000001070483bc mlir::PassManager::run(mlir::Operation*) (/workspace/build/bin/mlir-opt+0x1029843bc)
#20 0x0000000107040808 performActions(llvm::raw_ostream&, std::__1::shared_ptr<llvm::SourceMgr> const&, mlir::MLIRContext*, mlir::MlirOptMainConfig const&) (/workspace/build/bin/mlir-opt+0x10297c808)
#21 0x000000010703fd30 mlir::LogicalResult llvm::function_ref<mlir::LogicalResult (std::__1::unique_ptr<llvm::MemoryBuffer, std::__1::default_delete<llvm::MemoryBuffer>>, llvm::raw_ostream&)>::callback_fn<mlir::MlirOptMain(llvm::raw_ostream&, std::__1::unique_ptr<llvm::MemoryBuffer, std::__1::default_delete<llvm::MemoryBuffer>>, mlir::DialectRegistry&, mlir::MlirOptMainConfig const&)::$_1>(long, std::__1::unique_ptr<llvm::MemoryBuffer, std::__1::default_delete<llvm::MemoryBuffer>>, llvm::raw_ostream&) (/workspace/build/bin/mlir-opt+0x10297bd30)
#22 0x00000001070bebe0 mlir::splitAndProcessBuffer(std::__1::unique_ptr<llvm::MemoryBuffer, std::__1::default_delete<llvm::MemoryBuffer>>, llvm::function_ref<mlir::LogicalResult (std::__1::unique_ptr<llvm::MemoryBuffer, std::__1::default_delete<llvm::MemoryBuffer>>, llvm::raw_ostream&)>, llvm::raw_ostream&, bool, bool) (/workspace/build/bin/mlir-opt+0x1029fabe0)
#23 0x000000010703a6e4 mlir::MlirOptMain(llvm::raw_ostream&, std::__1::unique_ptr<llvm::MemoryBuffer, std::__1::default_delete<llvm::MemoryBuffer>>, mlir::DialectRegistry&, mlir::MlirOptMainConfig const&) (/workspace/build/bin/mlir-opt+0x1029766e4)
#24 0x000000010703ab54 mlir::MlirOptMain(int, char**, llvm::StringRef, mlir::DialectRegistry&) (/workspace/build/bin/mlir-opt+0x102976b54)
#25 0x00000001046c758c main (/workspace/build/bin/mlir-opt+0x10000358c)
#26 0x000000010fd4d088 

``` 
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzsWttu27rSfhrlhohBkTpe5MJ1EvwFGjRIinVrUNTI5l_qsEkqidfTb4iUbdF2ktqr-4CFXRSxRA7n8M1wZiiJaS1WDcBNEH8J4tsr1pt1q24WrZRt1yrTa3xVtOXm5uHb1ydU9EIaxAzibV0Lg1AR8TgqCA7wbYDnT9Cptuw5lOhVmHVA5wi5mSDBtRTquu0Mur7mbfMCyly_ADetujbtte6EekEG6m420AXJyNH93Y_T-Y6f-49qIRWaEiNU9Q2fDX9QA9pAiYIID7dhQLKAxEyt8KCagUa3KqCL_E0kUUDvArJAbj4c5kW4HyBuIAlIjq4DerdfHND7t2GC3qEg_TKqEJCY53FOMxqH2VJQggJ6i5gSZj3jbaMNawzaESDLnJKt_siuD-mpRXZ0jkRTwtsBfXySPn6XPj9Jn79HT5JT9Hb0NH12kj57h544dezErBQv_WjU6AMeUo-cOmtdBM0K1bKSM21OIm_BRaYdqQO6yN4GuOmdxzKKnMJVJRqY1extvFzWrBscTbIS7_xv71BA5igLSG6DJ3NWD7dTtgmZalozo8Tbsu6lEZ3cOFNGGweb0i9yrZe8lX3daLtwHx5kgYZJ1b66mXA6ow6W7SfTW3sZkOzYfrI4AcrWxt1M6MMVkDjFVojm1cx6bKlfheHrEUa7uoZaQbXbIRa0HS6caRhU3O0YNKIVknQSBxyELMWLdny3oUCS6SInZ8akbDlbat52gA4ZO9ZxNvWEXvdVJcG5aOKB-Ase7uwQDWIH3jEUJ5Eb8UlvD6yyyi2pC_Gpwi5qQpIGxG28Y9SmrAa8NwJkecD043WePiVUrJfmBPQjv-wdJUl-uY7ZeTpaSFy6cXl2BnVnNuMWC3eKnEjCIxMFplfNntFHtHvZu6qydaSrPopxOK48Q0prJbjRudagjGgbVDEhoRw3nCjfUEAXSIs_IXCpYfi_sCXKkrcdKDZEkS2_dkpIQM81k_IPF6hru_FFA4jk0czJe_x2N3--Q7ovhjLMUNGvkIKhYA95bm1MpweNyX1A7lfCrPtixts6IPdSvmx_rjvV_j9wE5B7oXUPOiD3iDUlEg2XfQnIrAFxxfQaFYz_tDCM4p8N4z9R2dfdDhc8C3D-qNqVYjViatXX0Bht3X5O4d9mGIoRfsPuX4ijvOBxlCGrPZ0HdK432l08KtEYq88P6yeS7YkUe1222ihgdUCSAUbRGBs8gy_uX1v1U3d20f3Q2ZTDr2gCcr9VOSBf8FuIMamyOJpk9oDQ8EA_lkJ0Sr-nvnkWq4bJ_2NNKUFpFwcXqJCkEHkqkEOIiipCnrAhBC-2uKh8cXQijkUJLyMejXx7rYagEkVA7vVGG6jdrbtedpKZqlX1rNxYmkFEhmkURtwXEfkiihgA_6IIs1bAygMJJAfAnoTYkxBXmEa_KIH7vEkS0cjnnfi8oUrjXwToiDdNYx-ZdOrrDIoiz63erGmbTd32GjWshtG3uQs9lz-eXZ373i3c5nNzNTN8PW_KJ3hVwgzbZttf0_m2rg3Xu9XD7vmEZF6ybhj1KJ1ULdrmkRkDqhklKrsjc2Q7w8GSGW9lOQvxBdEapVWa574zsilgSYEx5vzvBdg5CJGIcsy5h1DuIcSqKqfZRI-t_RNNArr4zGh69zlc323NE20TkLmtbbusOVeKbZ5sj7An_4PJHsaW618PU5HTfaIf8rxXiFKcMYiij_Q43_79zO80JecJRJFnilezsiSuijQ6lj7vOik42zn395kydfW2A1q6lrBoW4k81iMDZ71DYgyCd5m8tKL8y0z2i7-1K8GZfAJtG-Zf4TsmkoBES-Iudw3e2P5lF3uUVnlRpL5HyYFHOaT4fx79rR69wE0ZpNhzE_VzSJ5kLPusGO0c8Q1WTIo_YVRUjre_6LXP8uTZaaUkGfMzZHSQIaFkn5bancJjkd1aN54QdtPaa-hP1gfP9rPj6VawVdNqI_hfcTrJOSsZ92CJD5yOKzzdm6zr5OaRKSOY3DvpbK_-YGoFZtyMe4J71f4JW1-Pnn8GMwnvKUq30Gh4BvM-rsfkD6z72lTth0sGuG1LcGcHLoGVV9jfS8lBY0fi7NNOeAwy19_9aJ8fvz798cj0eERTffO9mah-yfmMRBTizNc09QMgioFOy20Jhgm5Be5H-70bVNr2hFvNDpKU1kex8H6UzBsmN1roB9awFdg-c8jKw2_f2Of-5YUnYpJnIVC_FmUH5iYxOd_cR9GBFM1hdhtId1Ykv91-v8xp_bXRRtknGEPhPqqDUwIn2U2Muj8yBY0ZNsd2u10W-xmJiQ9xfgBxRgt-oNnW1pPx40N1iUoRLbwsRw7a4whnOEMdqOG8P-fHKfz4mYw2pZtaLsPx4cmaKSiXnVEBXeyXPre94vCwUgG98xLZ3sCHb1-fFm1j4M0c-e1BCvW9Mw9MDEWnEqtprT8fipRn2KuDJPShoFVJpwnfbz4u6VaOkeob8Y8ejpB6gLpVmy99VbmoP144PgZeliDBwPuLx-Q9zf6HHsx3hz7OpCwY_7ms_KPiBPmzY-HfZ6HXE0jg5glWQhu1OY6yjyJpfwII3Wsh2Tar_7RtH3jvgsgvSupVOkL8yC-ggGnk604KM2_KR9Vy0Hpr2X9JPP8t9t-HFPuy534v8HnFCvB9fnCmoSyB6PQe-fvv-Qv2UJKAV9tJdIhnEb-P59i18DVz_clBg_5slGhWw0HpUxsv0r2Ifd29o06U8DTOOKqZaM5-74AxjTO_w_Aa_qqMSpxl3hcf-49BrsobWuY0Z1dwEyY5znCeRtHV-obRmMWUlywLeZIDpUUWJSQiYYVDHhfhlbghmFCc0jCkhJBoBhVUKSN5yVPAZQlBhKFmQs4GlGetWl3Zl2Y3SUTS8EqyAqS2H9EQ0sArspMBIUF8e6Vu7Ou2ol_pIMJSaKP3XIww0n59Y90U36Igwec8h06we0c3fnODmPcmslcwMDzxHjLBV72SN5e_KrSG_zMAAP__jFvRzQ">