<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/64204>64204</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [i686] Cannot select llvm.{min,max}imum.{f32,f64}
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          Urgau
      </td>
    </tr>
</table>

<pre>
    It seems that none of these intrinsics are currently implemented for non-x86_64 (with the x86 backend):

- llvm.minimum.f32
- llvm.minimum.f64
- llvm.maximum.f32
- llvm.maximum.f64

Error output [\[godbolt\]](https://godbolt.org/z/EPe7xEd5j):
```
LLVM ERROR: Cannot select: 0x7217400: f32 = fmaximum 0x72172b0, 0x7217390
  0x72172b0: f32,ch = load<(load (s32) from %fixed-stack.1, align 16)> 0x719cd80, FrameIndex:i32<-1>, undef:i32
    0x72171d0: i32 = FrameIndex<-1>
 0x7217240: i32 = undef
  0x7217390: f32,ch = load<(load (s32) from %fixed-stack.0)> 0x719cd80, FrameIndex:i32<-2>, undef:i32
    0x7217320: i32 = FrameIndex<-2>
    0x7217240: i32 = undef
In function: _ZN1a4test17hb60f9f6975710eeaE
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /opt/compiler-explorer/clang-trunk/bin/llc -o /app/output.s -x86-asm-syntax=intel <source>
1.      Running pass 'Function Pass Manager' on module '<source>'.
2.      Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN1a4test17hb60f9f6975710eeaE'
```

Similar to https://github.com/llvm/llvm-project/issues/53353 which was for x86_64
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJykVU1v4zYQ_TX0ZSBDIvV58MGxrUWAbBskaFH0sqAoSuKGIgV-NE5_fUFaya6LtFs0gECbw5nH94bkDLVWjIrzHSpuUHHcUO8mbXa_mJH6Taf7l92tA8v5bMFN1IHSioMewE3cchDKGaGsYBao4cC8MVw5-QJiXiSfuXK8h0GbEJac6_JLmQPC9bNwU0CAc11CR9kTVz3CDSJ7lB5Ruo4JSPnHvJ2FErOftwPB79vL_NpOz-_7v9pf_S_jyRhtQHu3eAcxCQdU3Iy677R0cXIMH64n5xYbKOIW4XZ12GozItz-iXB7uufV-dQXX6-UlOn6xend3a-f4fTw8PMDIns4UKV0yK7kzAVDeq5wVuVpGiYDwYDIEYaV-LqKuxThwzohzQoM361eYhE-sCkCSE17RA4I1-FfyL8Nyw0MRs-AcDGIM-8T6yh72mYBnEoxKsjKqOQUoLOG9XXcuDV05req52dE9oJgRA5JhsgprHnV82E1r7ReiWV9JCZWUd-jrPGXgFVGfuV9wb0SGpR_SGj6X8XhH4sj-F_E4W_i3gL-Wd-tgsEr5oRWwePL7z9lNHfcuqyaujIdmqFsqqLKUs7pCnt_d9o_nsD6bhYOKHR-BMMXbRw4DX-7tsJNvtsyPSPchmex_iSL0V_DLcStsNZzi3ALVPUgFJO-5_G1MkPtFN-rM5Tx7WX7x5BO6P28vN36dIvS5t7o0dAZqBl9qASBBCDc6iXswvS8CMlNws-L1IabYJNUjYkzXj0h3HZCRXIMEh3i6LKE6PhQtxZCOUmonRP7ohw9I3IUynEJiBys9obxt7Rngc2DV0qoERZqLSBctWuS4T4YPlNFx8ChAq1g1r2XPHhdgeFqVYzfA_ytLuG4_5QgcjruP8Gtss74yxaP8YGHE73gvx5w3CFPf3DGuHq3lKzJF7OQ1HzsoAtCCgLPk2ATPFMbC_alWG_6Hekb0tAN32VlkxZlmdflZtoxyhpWso52OcUsxw0vaJ3zjDDGO5ZVG7HDKSZpheusyuu03OKBNaymvMQ1b4a-QHnKZyrkNhZnbcZN5LMrc5zmG0k7Lm1sShgr_gxxEWEcepTZRSWdHy3KUymss99QnHAydjNR1iUqjtdV9tIKUHUzh9t1mOkZVcfYFlB1cykmoT9Ux403cvf_UxpV_BUAAP__BLwwuA">