<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/64050>64050</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            aarch64 NEON redundant displaced ld3
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          neldredge
      </td>
    </tr>
</table>

<pre>
    Given the following C code, compiled on aarch64 with `-O3`:
``` C
#include <stdint.h>
void CSI2toBE12(uint8_t* pCSI2, uint8_t* pBE, uint8_t* pCSI2LineEnd)
{
    while (pCSI2 < pCSI2LineEnd) {
        pBE[0] = pCSI2[0];
        pBE[1] = ((pCSI2[2] & 0xf) << 4) | (pCSI2[1] >> 4);
        pBE[2] = ((pCSI2[1] & 0xf) << 4) | (pCSI2[2] >> 4);
        pCSI2 += 3;
        pBE += 3;
 }
}
```
[Try on godbolt](https://godbolt.org/z/KG8eq4vjq)

In the inner loop (line 53 of the asm on godbolt) we have the following:
```
        sub     x16, x13, #1
        ld3     { v0.16b, v1.16b, v2.16b }, [x16]
        ld3     { v3.16b, v4.16b, v5.16b }, [x13], #48
```
The second load is redundant.  After these instructions, v3 = v1 and v4 = v2.  v5 is different but it is not used by the subsequent code.  
</pre>
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