<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/63267>63267</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [SelectionDAG] Legalization crashes for llvm.maximum/minimum
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            annamthomas
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          annamthomas
      </td>
    </tr>
</table>

<pre>
    Here's a reduced testcase:
```
declare <4 x half> @llvm.maximum.v4f16(<4 x half>, <4 x half>)
define <4 x half> @fmaximum_v4f16(<4 x half> %x, <4 x half> %y) {
  %r = call <4 x half> @llvm.maximum.v4f16(<4 x half> %x, <4 x half> %y)
  ret <4 x half> %r
}
```

Similarly, we fail in another case:
```
declare <2 x fp128> @llvm.maximum.v2f128(<2 x fp128>, <2 x fp128>)
define <2 x fp128> @fmaximum_v2f128(<2 x fp128> %x, <2 x fp128> %y) {
  %r = call <2 x fp128> @llvm.maximum.v2f128(<2 x fp128> %x, <2 x fp128> %y)
  ret <2 x fp128> %r
}
```

Both of these when run with llc -mtriple=aarch64-none-linux-gnu -mattr=+neon test.ll
The first fails with:
```
LLVM ERROR: Cannot select: t12: f16 = fmaximum t38, t33
  t38: f16 = extract_vector_elt t37, Constant:i64<0>
    t37: v8f16 = insert_subvector undef:v8f16, t2, Constant:i64<0>
      t31: v8f16 = undef
      t2: v4f16,ch = CopyFromReg t0, Register:v4f16 %0
 t1: v4f16 = Register %0
      t9: i64 = Constant<0>
    t9: i64 = Constant<0>
  t33: f16 = extract_vector_elt t32, Constant:i64<0>
 t32: v8f16 = insert_subvector undef:v8f16, t4, Constant:i64<0>
      t31: v8f16 = undef
      t4: v4f16,ch = CopyFromReg t0, Register:v4f16 %1
 t3: v4f16 = Register %1
      t9: i64 = Constant<0>
    t9: i64 = Constant<0>
In function: fmaximum_v4f16
```

The second also fails during ISEL:
```
LLVM ERROR: Cannot select: t29: f128 = fmaximum t4, t8
  t4: f128,ch = CopyFromReg t0, Register:f128 %1
    t3: f128 = Register %1
  t8: f128,ch = CopyFromReg t0, Register:f128 %3
    t7: f128 = Register %3
In function: fmaximum_v2f128
```

Working on fix upstream.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy0VlFv8jYU_TXm5QqU2EkID3mgULZP6jSpnbbHyjg3xJtjI9tp6X79ZBP6AR-IDm1S1cDN8bm-59yLzZ2TG41YkfyBUMq15p1vTccdoZTkyxHvfWtsdfRitDb1R_UzWiR06oCDxboXWINH5wV3SNicJEuSzEmRDH_xa41CcYtA2CKDHbRcNYQ9AskSpd66Scd3suu7yVvWpAWh5SmM0AWcR2YH3kbqS7TNQPl6mRIIzXc_8obwB6EzINOHfQIIIQuELUFwpe4r4Ea2QyaL_gLCDoJOlxeV3f9_kZ1U3KqPkOUdoeFSgdTAtfEtWviiNxR20GzTsP8LtdEmvInFHQOHwk5DP_hzTv3doCu0x6Kdx296dFchtzKe-XQO-ZJRD8a3YBrwLTqE9xY12F7Du_QtKCVg3HkrtwoJW3JuRVtkY200jpXU_W680T2MO-69JWxJ6INGo-PsTZTa8__WIjTSOh9bwEXia8Y_Pf3-Czw-P__6TNgcFlxr48GhQuFDwKc0PJq0iNIeDAPPyiCSZ-wgSIgcIXHnLRf-9Q2FN_YVlQfPpmHNwmjnuQ70ssgIWyShWQYWiCg2h7fywCS1Q-tfXb_ec0Gva2wIm0dI3AX9Am9gTk-Z90THiFjsML8L0UbUwmw_VtZ0z7gBn4RMz7iRzqMNe8giGc0HOcGnnxRx9QF7jNnnmgWgLLIhyWHz53J8BRZsuKX9TY0C5N8Kn_1Xwmd3C59-bv-68On_I_w3DU2vhZdGR_lPj5vr8x_m06EwugaunBmmtO6t1Bv49vL4dO-w0tm-DWh5Nq3RJ19-9kt2wH1R7T3liZCeneS6KLcv78zDjvJMr-ZhN2zY_8Rf9-EPY_8KkhsNjdxBv3XeIu8mo7pi9YzN-AirtCiLvMzyrBy1VT4tM8wE58lMZKJsRJnkPKNNPWVFmuJ0JCuaUJYUKU3zjNJykpS8Sfg6Wa9Fna5zJFmCHZdqEg8jYzcj6VyPVcFoMR0pvkblhruYxneIL4ebmK3CmvG637hwmEnn3XcWL72Kl7iX2A3S6OX8J5Iv4Qk3XMm_eQiBsNy16KAxFo5PQ0JXndTh06i3qmq937rQg3RF6GojfduvJ8IEWFg1PMZba_4MnUdXcZuO0FUs458AAAD__wis4_E">