<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/62190>62190</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
Incorrect instruction emission with `-mips1`
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
AngheloAlf
</td>
</tr>
</table>
<pre>
I noticed Clang 16 is emitting invalid instructions when targeting MIPS I, specifically I noticed clang is emitting `ldc1` and `sdc1` instructions, which were added in MIPS II (see the bottom of the issue).
Minimal test case:
```c
double test = 1.0;
double getter (void) {
return test;
}
void setter(double value) {
test = value;
}
```
Assembly output, compiled with `-O0 -mips1 -EB`:
```mips
getter: # @getter
addiu $sp, $sp, -8
sw $ra, 4($sp) # 4-byte Folded Spill
sw $fp, 0($sp) # 4-byte Folded Spill
move $fp, $sp
lui $1, %hi(test)
ldc1 $f0, %lo(test)($1)
move $sp, $fp
lw $fp, 0($sp) # 4-byte Folded Reload
lw $ra, 4($sp) # 4-byte Folded Reload
addiu $sp, $sp, 8
jr $ra
nop
setter: # @setter
addiu $sp, $sp, -16
sw $ra, 12($sp) # 4-byte Folded Spill
sw $fp, 8($sp) # 4-byte Folded Spill
move $fp, $sp
sdc1 $f12, 0($fp)
ldc1 $f0, 0($fp)
lui $1, %hi(test)
sdc1 $f0, %lo(test)($1)
move $sp, $fp
lw $fp, 8($sp) # 4-byte Folded Reload
lw $ra, 12($sp) # 4-byte Folded Reload
addiu $sp, $sp, 16
jr $ra
nop
test:
.8byte 0x3ff0000000000000 # double 1
```
godbolt link: https://godbolt.org/z/jro1oGfbz
Instead of emitting the `ldc1`
```mips
lui $1, %hi(test)
ldc1 $f0, %lo(test)($1)
```
Clang should use `lwc1` on `-mips1`:
```mips
lui $1, %hi(test)
lwc1 $f1, %lo(test)($1)
lui $1, %hi(test + 0x4)
lwc1 $f0, %lo(test + 0x4)($1)
```
It uses `$f0` and `$f1` because on MIPS1 doubles are composed of two 32bits registers
For little endian machines, the `$f0` and `$f1` registers should be swapped, ie:
```mips
lui $1, %hi(test)
lwc1 $f0, %lo(test)($1)
lui $1, %hi(test + 0x4)
lwc1 $f1, %lo(test + 0x4)($1)
```
As an optimization opportunity (but not required for this issue) would be to reuse the `lui` instruction
```mips
lui $1, %hi(test)
lwc1 $f1, %lo(test)($1)
lwc1 $f0, %lo(test + 0x4)($1)
```
This same logic applies to `sdc1`, clang should emit two `swc1` instead.
Finally, here's a screenshot of the MIPS ISA stating this instruction was introduced on MIPS II

</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy8V92S2yoSfhp802UXIMmWL3zhyay35iK1W5t9ASS1JHIQ6AAaZ_L0p0Dy33jGGSc5R5VyRqL5uvn4oLuFc7LRiBuSPZDscSYG3xq72eqmRWW2qp4VpnrZPIE2XpZYwScldANsCdIBdtJ7qRuQ-lkoWYHUztuh9NJoB_sWNXhhG4w2n5_--wWeCP8ErsdS1rIUSr3ACbmMyOewZElVVTKypCB0FV7d9HruKEDuW1m2sEeLIKoKQySTwycgPHeI4FuEwnhvOjB1fJPODUj4ekHoI6Hb8fez1LITCjw6D6VwSJJphCzp-K8c3yszFApHQ5I8AltQkjycY00WDXqPNsTxbGRF-BrIarIDALDoB6sjzmn-6vEcKMwDF2EIzyfYZ6Fi-Jdox3DG4WvAwyrO8bfOYVeoFzCD7wcfGC1N10uFFeylbwP18_9QmHeydwzm_3oIAFfEhNHx07hkkmyB8ARISqcPxzDDI6pKDgBAeOr64PP4xzy_tHT7MGZFGEsJzyfDNbz1BI_pvHjxCDujghi-9FKpK8TJOK2jS_pbYDvzjBewI-SFjRrkwTUbTbJWEp5HAfD1K-OqZAdAOlkrc2Ydo2ZX884COXJbvw7kJgfX6_0fKiOqdzHe2J6PYbyvg4MMvtpzLxeTtZlW5Y6S-9EzSdLdJ0m2fFdB48oZv730j6gwvxviI4oLt2Y0CCEetzmY_0htN0zvUbH7J1Wc33-SP6Tsy_39adz3JfZaYW-p_ij3MV1sL2cs8ugd6Lekrun5cx3plEXYjbTQmKowyoOS-o9wsFrvexec8h3hu2l0YWxD-O474buv1jDz77r4fg4y_j5p51FUIfUe03vIwacU_24u-SnF3Xtvvlr_VOa41gyqgsGNge7H4sPomA9jLvxBHrwz6P0paPaRY3ILHQh_APotvenliprzWbcpmvbVB3ZcIGTEO9Vq4yqWFAosRaDQjDUZm6TnQFiMdYZxGJXh9wYSXkjvwGIjnUfrzp3tjAUlvVcIqCspNHSibKXGWANOcno3jCPkYVsLBLcXfY9VmC7fqPR-VYS3mL5x7f3ytl6J595t3ToQGkzvZSe_i1Bmg-l7Y_2gpX8JpWwx-FC5g8U_B2mxgtpY8K10x7Ia9geWvQGLQQGHEz_IV0X8b-L97gP0dxyJ_wcSnOgQlGlkCaLvlUQXWDh1MLHEPr9jwq0YD0Cw2Z-6HBTVRX-ykzr0TWF-ixYJXzkQ4EqLqF1r_KG5GbufL1twXky3bdibE-WwF-HdW1MNof0yx45pcscZyR5kJxok2SPh-eXtPzi08zjqFo307VCEL6XRHrVflKYjfLdK2TLJGeE7nvBlwtI1m6-zpKCUZnPO-XqeZlTM8yxh84zlaYF1uSpWyaLXzYnj-DurNkm1TtZihhu2zNlqtcxZOms3db4uc44sL7IyWdMkzZZFjYVYF_WqWmViJjec8oSmLKeUJUm6SDHDBAtW04JlSS1ISrETUi2Ueu5CNptFBW-WnK3pTIkClYvtMeca9wd589At202YMy-GxpGUKum8O6F46RVunnRprMXSX3CPnXQubsKhuzpkk9lg1eZVoo30TpwG-Om_eW_NVyw94bsYlCN8F4P-KwAA___fjjWu">