<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/62151>62151</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64] unimplemented reg-to-reg copy: Q2 = COPY Z0
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          MattPD
      </td>
    </tr>
</table>

<pre>
    It appears new--likely introduced between April 4 and April 5 (see below for the information on the commits used to reproduce and  Compiler Explorer links).

Source code:
```
typedef struct {
  int j, k;
} box_type;

int sink;
box_type ba, bb, bc;

void build_interpolation() {
  int fineBox_j = bc.j, fineBox_k = bc.k;
  int coarseBox_j = fineBox_j * bb.j / ba.j;
  int coarseBox_k = fineBox_k * bb.k / ba.k;
  int coarseBoxID = coarseBox_j + coarseBox_k * bb.j;
  sink = coarseBoxID;
}
```

ICE:
```
# *** IR Dump Before Post-RA pseudo instruction expansion pass (postrapseudos) ***:
# Machine code for function build_interpolation: NoPHIs, TracksLiveness, NoVRegs, TiedOpsRewritten, TracksDebugUserValues

bb.0.entry:
  renamable $x8 = ADRP target-flags(aarch64-page) @bc
  renamable $d0 = LDRDui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @bc :: (dereferenceable load (s64) from @bc, !tbaa !5)
  renamable $x8 = ADRP target-flags(aarch64-page) @bb
  renamable $d1 = LDRDui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @bb :: (dereferenceable load (s64) from @bb, !tbaa !5)
  renamable $d0 = nsw MULv2i32 renamable $d1, killed renamable $d0, implicit-def $z0
  renamable $x8 = ADRP target-flags(aarch64-page) @ba
  renamable $d2 = LDRDui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @ba, implicit-def $z2 :: (dereferenceable load (s64) from @ba, !tbaa !5)
  renamable $p0 = PTRUE_S 2
  renamable $z0 = SDIV_ZPZZ_UNDEF_S killed renamable $p0, killed renamable $z0, killed renamable $z2
  renamable $q2 = COPY renamable $z0
  renamable $d0 = MLAv2i32_indexed renamable $d0(tied-def 0), killed renamable $d1, killed renamable $q2, 1, implicit killed $z0, implicit-def $z0
  renamable $x8 = ADRP target-flags(aarch64-page) @sink
  STRSui renamable $s0, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @sink, implicit killed $z0 :: (store (s32) into @sink, !tbaa !5)
  RET_ReallyLR

# End machine code for function build_interpolation.

Machine Function
********** EXPANDING POST-RA PSEUDO INSTRS **********
********** Function: build_interpolation
real copy:   renamable $q2 = COPY renamable $z0
Q2 = COPY Z0
unimplemented reg-to-reg copy
UNREACHABLE executed at /root/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:3811!
```

I've been able to reproduce on Compiler Explorer. Note that at the moment of writing Compiler Explorer's x86-64 trunk build us newer than AArch64 trunk build; we can compile using `--target=aarch64--` (which then allows to use AArch64 targets via `-mcpu=a64fx` as well).

This is interesting, as it also seems to point that the change happened between these two commits, i.e., between April 4 and April 5:

upstream ICE: https://aarch64.godbolt.org/z/q7hr1acnT
clang version 17.0.0 (https://github.com/llvm/llvm-project.git 39c0602414d4b0efb1e4749b0e9fdd7974026bf7)
https://github.com/llvm/llvm-project/commit/39c0602414d4b0efb1e4749b0e9fdd7974026bf7
2023-04-05

no upstream ICE: https://aarch64.godbolt.org/z/3PhPbjqPr
clang version 17.0.0 (https://github.com/llvm/llvm-project.git 5b461d5ec172d21029da492064704fe3da6f8bab)
https://github.com/llvm/llvm-project/commit/5b461d5ec172d21029da492064704fe3da6f8bab
2023-04-04
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy0WNFy2rwSfhpxs4PHlo2BCy5IDOdnJk05JOmc05uMZK9BxUiuJIekT_-PZAiQQibttDMeY-Tdb3e_XUkrM2PEUiKOSO-K9LIOa-xK6dEnZu0863BVvIxmFlhdI9MGJG673UqssXoBIa1WRZNjARztFlHCuNaiggSYLHbPPSB0YBCBY6W2UCoNdoUgZKn0hlmhJCjph3K12QhroDFYgFWgsW7hPRpcq00tKtQwea4rpVFDJeTaEDoMSJiRcNze71SjcwdWIIl3YyQNd5f_a19qLLAEY3WTWyD9q3YcXETwjdBrWJN4N0j6GXD1_OiUDoP-7qSNkAfZvRxw5kA49_f8jdqTEgXwRlTFo5AWda0qzwOhA0KHb90phcQr9fz4DUicAc8D799-dL0fPTjRquWKaXOkeARDx8B54B6mwFnw7aLm-kRzvddc7zUv2pxlXvPEB3p1irzz4gjCUXmqN8uO03A2l-19dj25lGxCY2esvWC2gKzZ1HCFpdIIc2VsdzGG2mBTKBCyLQlXlPhcM2ncU82McUVcK2M1a0WNz9Qe9mCbxvCJ5Ssh2wr05V42soU8l_N4DLdq_s_MuKzea5avzY14QonGj9yqLwtcti8FFp9rs8CtFtaiPChkyJvlg0H9hVUNmmNiOA_CAKXVL68-AmiUbMN4hUBo8jzwnI-zxRws00u03bJizuSAMZ2v0qRbsyX6eJOQ52dBitCD3GSLrBGwFlWFxVszzt93DKiydBL7IZm_WgTnejx2KShQY4kaZY4euFKs8OtLmjjxUqvNzkt6DYRGljPmfnuEDv9E9Px89NHfi57_RvT8o9Hv0ibNFj493DxREdO3kfnF8ExERejeiE1diVzYrltOCU1-hH-CZXbeWfr3WGZng6G_wT37KPd1y_38fvEwebwDelboRyt0l82-PH6df_36-HCbTaaPd2fDr8NLyfpx-c15u99brq8_z___E9I7hfTpZuyL6FHIAp_PlczACiw8waEj5lJxXSy779S9iY7TtZd7jfOvFKXf53cwd_eLu0acopmLFP92VXqTlwI9Kk1j3VbmHmLqVIW06lj_QjUuJvePC2RV9XKzON4y3B42kQVsfmUfO2nB9jvgdKewx33vgsn_5uPbbHb7H5h_vrt3m_L8bvKQfYbZreMb3lf_kIlXf-Lx2b3YY2hkFeSqdhsm_Oq0-O-RwNfdWCNdAnGD0vrSWHat6mpctka8yMPtYjK-_md8dTMBfMa8cZLMuj5LK2UJnVbV06Zba_UN8_1f9yM4odN7X1qETsdjX0GHp5nrZ2ayVEFe1yQex4MoIjR6r5EitP_kenWU4IM76cOV_LkLD-BWWQS7Yta57Br5jXLBgirBtSpCLn_WIrRv4HmQdtMErG7kuk0INP6Ege6MwCTswjiWIPEVbBFyJt15wYFCY5wJkobdbjvLSJztJ1OXpKGbGtuVyFfOOQmsqtTWuMAagwcTXtPAk2AeapPXjcNJk_LZYTADW6yqt6eN-5Uw4C5XSGhcsH4uGxAWWGUUGMSNt1Yr1yN7nvxpZ8XkEmHlDlby6ARlV2gQ7Fbtz0N-CQgw8GeJy8esQw_aVl1trEa2gbY1hpW1tXEydErodEdPsFQFV5UNlF4SOv1B6PR7f6Ujlsv7FiavmFzCE2rfCUf9IAw8n6dwS2FXDQ9ytTmqzaOKDZbCQjzMwzSkSZQUCQ-x5BEm_WTIQxyWRdEf9pOQprzsvy5Rv2aD0GlLGKHTD5vydmhI426YdMPeMYFSwe9yGM9Xc_7t-1z_cQ57PEmjood51KcFjUI6LFgypGGa9MOkxLhgaTngjP8BDj9s6pTDpFOM4mIYD1kHR1E6iHoRjcOwsxphwmke8jzmEafhIB8O-nTIS0Z7bJjm2OuIkUMJkyihNOmFYUBZPhyyOOVlL4pokpIkxA0TVeB8dnx3hDENjlIa9aJOxThWxn_FoFTiFvxLQinpZR098nHyZmlIElbCWHNAscJW_vPHfgHtZfD-qh2P4XSp7zS6Gv0y2d5DQ-jUR_BvAAAA__8_ElPa">