<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/61767>61767</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[AArch64] SMIN(a,0) and SMAX(a,0) performance regression after SPF canonicalization to intrinsics
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
mcinally
</td>
</tr>
</table>
<pre>
On AArch64, SMIN(a,0) and SMAX(a,0) are no longer being peeped after the following commit:
```
commit a266af721153fab6452094207b09ed265ab0be7b (HEAD)
Author: Nikita Popov [npopov@redhat.com](mailto:npopov@redhat.com)
Date: Mon Feb 14 17:18:07 2022 +0100
[InstCombine] Canonicalize SPF to min/max intrinsics
Now that integer min/max intrinsics have good support in both
InstCombine and other passes, start canonicalizing SPF min/max
to intrinsic min/max.
Once this sticks, we can stop matching SPF min/max in various
places, and can remove hacks we have for preventing infinite loops
and breaking of SPF canonicalization.
Differential Revision: https://reviews.llvm.org/D98152
```
This is causing a ~6% slowdown on 372.smithwa (with an out-of-tree optimizer).
I've reduced a test case to:
```
; RUN: llc -mtriple=aarch64 %s -o -
declare i64 @llvm.smax.i64(i64 %a, i64 %b) readnone
define i64 @smaxi64_zero(i64 %a) {
; Expected: bic x0, x0, x0, asr #63
%c = call i64 @llvm.smax.i64(i64 %a, i64 0)
ret i64 %c
}
declare i64 @llvm.smin.i64(i64 %a, i64 %b) readnone
define i64 @smini64_zero(i64 %a) {
; Expected: and x0, x0, x0, asr #63
%c = call i64 @llvm.smin.i64(i64 %a, i64 0)
ret i64 %c
}
```
This seems simple to peep, but it's really a can of worms. The problem is that marking the ISD::SMIN/ISD::SMAX nodes as Legal/Custom in AArch64ISelLowering is triggering other target-independent lowering code that also has performance regressions. E.g. the calls to TLI.isOperationLegalOrCustom(...) in SelectionDAGBuilder::visitSelect(…).
</pre>
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