<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/61623>61623</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU] Disassembler doesn't support opsel for GFX11 16bit VOP1/2/C opcodes encoded as VOP3
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          DadSchoorse
      </td>
    </tr>
</table>

<pre>
    LLVM version: 3a3ad9fe1811ebd7ff865b77f471d155d9a05ec8

Example input: `d5350802 00020200`, which should be `v_mul_f16_e64 v2, s0, v1, opsel:[1, 0, 0, 0]`

Current output: `v_mul_f16_e64 v2, s0, v1`
</pre>
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