<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/61468>61468</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[AMDGPU][GlobalISel] illegal VGPR to SGPR copy
</td>
</tr>
<tr>
<th>Labels</th>
<td>
backend:AMDGPU,
globalisel
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
chenzheng1030
</td>
</tr>
</table>
<pre>
Still from https://reviews.llvm.org/D141247, some unexpected changes:
td changes:
```
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index c10bbe7367a1..9117710a1aa9 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -2011,13 +2011,13 @@ def : GCNPat <
def : GCNPat <
(i32 (sext i1:$src0)),
(V_CNDMASK_B32_e64 /*src0mod*/(i32 0), /*src0*/(i32 0),
- /*src1mod*/(i32 0), /*src1*/(i32 -1), $src0)
+ /*src1mod*/(i32 0), /*src1*/(i32 -1), i1:$src0)
>;
class Ext32Pat <SDNode ext> : GCNPat <
(i32 (ext i1:$src0)),
(V_CNDMASK_B32_e64 /*src0mod*/(i32 0), /*src0*/(i32 0),
- /*src1mod*/(i32 0), /*src1*/(i32 1), $src0)
+ /*src1mod*/(i32 0), /*src1*/(i32 1), i1:$src0)
>;
def : Ext32Pat <zext>;
```
Get some LIT failures and some of them are not just code gen difference, for example for below case `s_ssubsat_i128` in file `CodeGen/AMDGPU/GlobalISel/ssubsat.ll`,
```
define amdgpu_ps i128 @s_ssubsat_i128(i128 inreg %lhs, i128 inreg %rhs) {
%result = call i128 @llvm.ssub.sat.i128(i128 %lhs, i128 %rhs)
ret i128 %result
}
declare i128 @llvm.ssub.sat.i128(i128, i128) #0
```
```
./bin/llc ssubsat.ll -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=tahiti
error: <unknown>:0:0: in function s_ssubsat_i128 i128 (i128, i128): illegal VGPR to SGPR copy
error: <unknown>:0:0: in function s_ssubsat_i128 i128 (i128, i128): illegal VGPR to SGPR copy
```
</pre>
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