<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/61110>61110</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [MLIR]`-buffer-deallocation` triggered error: "All operations with attached regions need to implement the RegionBranchOpInterface"
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          BealZephyr
      </td>
    </tr>
</table>

<pre>
    Test on commit: #[6740991](https://github.com/llvm/llvm-project/tree/67409911353323ca5edf2049ef0df54132fa1ca7)
Steps to reproduce:
```
mlir-opt test.mlir -buffer-deallocation
```
Test case:
```
#map0 = affine_map<(d0, d1, d2, d3) -> (d3)>
  #map1 = affine_map<(d0, d1, d2, d3) -> (d0, d1, d2, d3)>
  module {
    func.func @main(%cst:tensor<13x11x16x6xf32>) {
 %cst_2 = arith.constant 0.000000e+00 : f32
      %0 = tensor.pad %cst low[0, 2, 1, 0] high[0, 1, 2, 0] {
      ^bb0(%arg0: index, %arg1: index, %arg2: index, %arg3: index):
        tensor.yield %cst_2 : f32
      } : tensor<13x11x16x6xf32> to tensor<13x14x19x6xf32>
      return
 }
  }
```
Error message:
```
test.mlir:8:12: error: All operations with attached regions need to implement the RegionBranchOpInterface.
      %0 = tensor.pad %cst low[0, 2, 1, 0] high[0, 1, 2, 0] {
           ^
test.mlir:8:12: note: see current operation:
%1 = "tensor.pad"(%arg0) ({
^bb0(%arg1: index, %arg2: index, %arg3: index, %arg4: index):
  "tensor.yield"(%0) : (f32) -> ()
}) {operand_segment_sizes = array<i32: 1, 0, 0>, static_high = array<i64: 0, 1, 2, 0>, static_low = array<i64: 0, 2, 1, 0>} : (tensor<13x11x16x6xf32>) -> tensor<13x14x19x6xf32>
module {
  func.func @main(%arg0: tensor<13x11x16x6xf32>) {
    %cst = arith.constant 0.000000e+00 : f32
    %padded = tensor.pad %arg0 low[0, 2, 1, 0] high[0, 1, 2, 0] {
    ^bb0(%arg1: index, %arg2: index, %arg3: index, %arg4: index):
      tensor.yield %cst : f32
    } : tensor<13x11x16x6xf32> to tensor<13x14x19x6xf32>
    return
  }
}
```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy8Vltv4zYT_TXjFyIGOdTFevCDHSfAAt-HAts-9SWgxZHEQjeQVOP01xekfMvG3raLYI2AkWbA0ZyZMwejnDN1T7SGdAvpbqEm3wx2vSXV_k5j82YX-0G_rX8j59nQs3LoOuNBbhighHSb5QkvCgHpDnDVeD86kBvAZ8Dn2vhm2i_LoQN8bts_T_8eRjv8QaUHfPaWCPD5GETIVEqUpUpJV8iTgiquqzQREislSpUDFsB3wDe_ehod8wOzNNpBTyWFr0YXZPz4F1-71tiHYfTMk_PL8MYe9lNVkX3QpNp2KJU3Q3_zbsRcKnc3OKDs1MgZyB1TVWV6eunUCPIRcKU54CPTIp4YTwlYsAeQTyz4wxvIpzkSY3Ms8WOxbvuvoneDnlpikG9PFsaqqS-X4WCQ8E6ZHnAFmJYutNdT7wYL8lHIgxAHkR2yQyUxhMTiKs584QXnvK3xzbIceudV7xlf8vgjwC0PVdqwEOKcQACdztWbP7cclT5GZO3wCuk2AouIIjgO6Y41pm5OLnH2R9c7fIxB-rTf8xmWsjUPGZhe0yFcmG3ihg1v2OSVrTjzgR1_x_TfDLX6uiQfAee7aL5f3sDqd97kIIpL8a9iWfKT7U99yHdnJp0ev2Hrk7WDZR05p-q7lD6PCcjNCuRGxGJQuBoeNm3LhpFsHBrHXo1vmPJelQ1pZqmO1p5IBximG1vqqPfMN8S-Ru_Wqr5sfhm_9J5spUpa_kQ-nEjxPaj94ENxmCNi5WRtSP-M-FI1TOdRBcRLroB4RbYwJ7g6p_ANGX-EeCdbcoeMl2QiE8_pzLlEzV4FHl1Jx1lSA2vmyY5oe_3iqA7Ne3HmL3LH-bbqDeSjkTHTYwviEXThkTmvvClfQkfeX8hiyh9a9O5WO7zevXTdcvl0miLA1fd1KqL8p2n6qI13lPEkIf9WG2dCB_L-gDgCpqPSmvSNeQiJfMJA_ARG3hHHG3A_TRjfyeKVGH5QxYVeS13IQi1oLbI8zzHHQi6atcxWaYFJlmgtE6IkrwqUpcCkKkudp3Jh1shRcsmRSxRSLlGKTO0p1bTKiWuEhFOnTLsM-85ysPXCODfROhNC8EWr9tS6uHAh9vTKojNMa7pb2HXckfZT7SDhrXHeXaJ449u4qf3_f1--hp0r4ze3mYwzb01dkyV9EW9A_Hz9BsTFZNv1f979ImgXtr9QlL8DAAD__72P54c">