<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/61045>61045</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Unable to handle inline assembly ends with compat-branch on MIPS
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          FlyGoat
      </td>
    </tr>
</table>

<pre>
    Currently LLVM unable to handle the situation that a inline assembly ends with branch instruction and then compiler generate another CTI immediately.

It would leave compiler generated CTI in forbidden slot and crash at runtime.


Test case:

```
define i32 @foo0() nounwind {
entry:
  %0 = tail call i32 asm "1: addiu $0, $$0, 1; beqzc $0, 1b;", "=r"() nounwind
  ret i32 %0
}
```

Generate object file with:
```
llc -mtriple=mips64el-linux-gnuabi64 -mcpu=mips64r6 -filetype=obj ./broken-forbidden-slot.ll
```

Then dissemble with:

```
mips64el-linux-gnuabi64-objdump -d ./broken-forbidden-slot.o

./broken-forbidden-slot.o:     file format elf64-tradlittlemips


Disassembly of section .text:

0000000000000000 <foo0>:
   0:   24020001        li v0,1
   4:   d85ffffe        beqzc   v0,0 <foo0>
   8:   d81f0000 jrc     ra
```

JRC lies in forbidden slot of BEQZC.
</pre>
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