<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/60645>60645</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            AArch64 backend miscompiles testcase of pre-dec addressing mode with constant offset
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          huihzhang
      </td>
    </tr>
</table>

<pre>
    Use reduced test ir below:
```llvm
define i8* @test(i8* %ptr, i64 %t0) {
  %t1 = add nuw nsw i64 %t0, 8
  %t2 = mul i64 %t1, -4
  %t3 = getelementptr i8, i8* %ptr, i64 %t2
  %t4 = bitcast i8* %t3 to i32*
  store i32 0, i32* %t4, align 4
  %t5 = shl i64 %t1, 2
  %t6 = sub nuw nsw i64 -8, %t5
  %t7 = getelementptr i8, i8* %ptr, i64 %t6
  %t8 = bitcast i8* %t7 to i32*
  store i32 0, i32* %t8, align 4
  ret i8* %ptr
}
```
Run with: llc -mtriple=aarch64 < t.ll
```
test:                                   // @test
 .cfi_startproc
// %bb.0:
        sub     x8, x0, x1, lsl #2
 str     wzr, [x8, #32]! // wrong
        stur    wzr, [x8, #-8]
 ret
```

The first str is not generated right. It's pre-dec addressing, offset should be -32.
```
str     wzr, [x8, #-32]! // Expect -32 as offset.
```
Also note that this bug was exposed by https://reviews.llvm.org/D120216
Prior to D120216, we were generating correct code without auto-decreasing base address x8.
```
// %bb.0:
 sub     x8, x0, x1, lsl #2
        stur    wzr, [x8, #-32]
 stur    wzr, [x8, #-40]
        ret
```

</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyUVV2vozYQ_TXmZZQIbL7ywEPuTSP1rara58rABNwajOxhye6vr2zC3eQqaXetKMjmzPicmWMsnVPdiFix7I1lp0jO1Btb9bPqv_Vy7KLatF-rPx2CxXZusAVCR6As1KjNwsSRxScWH1kerz-tvwzrUosXNSKokvEjsDT2gYyXtznPJrKMv4PKUz-jmPEDsOJtDYawlgATJ5BtC-O8wOiWe_Q7lPdYHrDDrD8wicfs0nuQCKAOCTUOONJENhB8h1e0-H14GsJrRY30RdhCSAAZUIIzftzgjoxFvwaB6vpyTeLnUqtuhAduWUju-k8CHgjkK2auHwqyCwpCjntw8dNi8_vw8oXY4mfElk_EWqRHBquDitMnK63T3-cRFkU9E0fQuoHdQFZNGpk4SWmb3lMX70B7rZ_GB9uJI_z_YPzM-PnDqivbfXNRfzmSliZrmtsONyDP6noff5yBLY9vjx_XIP4aSnINvdROA-Nia6kjG4DLt9AFlr1db50UgrPsxHiykVqsGbtP29BsX0TvSh-9oi3S07qs_3_0CBdlHQUyysFoCDoc0UrCFqzqetrDr8R44WCyuGux8QfSonNq7Px-5nJxSOB6M-sWaoSd4PunW_6H3t1nwb9cJ2zI5wLpbns8z3rUznjaCNRLAuqVg3ruYJEO8DoZhy3UX6EnmpzvVchv8YvCxe3952pvbMf4-ZTwmCe3I_CbVcZ6o2-r_B0WhAUtbuVRYweNsdbTbEyLwaVmJpAzGV8ni9LXCGrpcKsZXMvnKl556ofN9AOuWGu8ee81Lo2_427jlYuithLtQRxkhFWSF9mhTEuRRX2VYN5ITDDPZM4zmZRtm2J9EXnblEUZx5GqeMxFzOMDFzwW2f6QFklZZLJNiwNe6oylMQ5S6Y8eRcq5Gas8ztMs0rJG7cK1xfmIC4SXjHuJka18zK6eO8fSWCtH3zsdkSKN1fG4fjtq2fyDYwuDco0ZJqXRhSuu8U0zlyeeh2FrNjRmdCRHuvkzmq2uHn3WKernet-YgfFzuBvXx26y5m9siPFzIO4YPwdh_wYAAP__H8YU5Q">