<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/60400>60400</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64][Intrinsic] Instruction generation problem Integer binary operations that have an immediate form 
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          lizhijin1024
      </td>
    </tr>
</table>

<pre>
    I find that intrinsics `svlsr_n_{type}_x` or `svmul_n_{type}_x`, gcc10.2 or later version will always generate instruction without p register, while the instruciton  compiled with clang has p register.
Here is the example:
```
#include<arm_sve.h>

#define NUM 19
svuint32_t foo_mul (svbool_t pg, svuint32_t op) {
  op = svmul_n_u32_x(pg, op, NUM);
  return op;
}

svuint32_t foo_lsr(svbool_t pg, svuint32_t op) {
  op = svlsr_n_u32_x(pg, op, NUM);
  return op;
}
```
Assembly generated by gcc12.2: https://godbolt.org/z/6sc3EcWGW
![image](https://user-images.githubusercontent.com/104253293/215640964-f4792da6-4f1d-4b60-ad74-50ffb0498359.png)

Assembly generated by clang trunk: https://godbolt.org/z/s6zMrMxos
![image](https://user-images.githubusercontent.com/104253293/215641221-7b74b806-e11c-4ee9-9863-e074c9adf4d7.png)

Thinking the case of auto loop vectorization, both gcc and clang generate `lsr` and `mul` instructions with no `p`.
```
#include <stdint.h>

void shl_int8_t( int8_t *restrict a, int8_t *restrict b, int8_t *restrict c, int n )
{
        for ( int i = 0; i < n; ++i ) {
                b[i] = b[i] << 7;
                a[i] = a[i] * 80;
 }
}
```
clang trunk: https://godbolt.org/z/EKfqsz8Wf
gcc trunk: https://godbolt.org/z/aoTqxK153

So can we change the implemention of shift and integer binary intrinsics that have an immediate form like gcc10.2 or later version?






</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy0Vktz2zYQ_jXQZUcaEARfBx0kK2o9mfTSdHLUgOCSRAICDADKj1_fASnbchK3aTvleCxgH-Du4vt2KbxXnUHckmxPssNKTKG3bqvVY68-K5NQxle1bR62t9Aq00DoRQBlglPGK-mB5NSftXcncyLFPjyMSIrD6Z7kFKxbtMOkv9cSdgOdlAndsGioRUAHZ3ReWQN3SmsQ-k48eOjQoBMBQRkf3CTDYhB6OwUYwWGnfEAXz7vrlUYI_bOtCtYASDuMSmMze4HUwnTQC3_lvCH0QOjuV3QIys8n4L0YRo0k3S26GPLyt2xZqozUU4MkvRFuOPkzbnqSvruon4wabJVB-O2PD5BUi9SfJ2VCyk4BWmtPw6SBsNKfa2v1KcDYxVSujOxIWAWk2C_uAHYEkh7gqbBTyk73hJWLY7S-ie8jrCLps4_DMDkTtU8yUhyuY_0mKu3dvwxqwcJ_Dup1uXfe41Drh2c0NFA_zPhhG0bSHfQhjD5eFjsSduxsU1sdNtZ1hB0fCTvmXqbv5KdfPj3dTEKyvRpEhyQ7EFa-9p88uvWs9ZtOhX6qo0RaE9CEjbQDYceEcpalrEoJO7Ikyzmtcr5ueVGxRuRr3ibNmtc5XYum4OuMtm1NeVWmWbUZTRcLcVX9H-e3QDW4yXz5mRx9_vjBfbi3_v_LMWEsWRd1weuS5mtMErnmiNW6KvN0jbTgshJNy5viBzl-7JX5omJCPYIUHsG2IKZgQVs7whllsE49ikjwCJfahj5eMQjTXErx3AtITiNCczorSU6HScfdVY_wC92NjeqR5HTzN0QGkt740CgTviPy2aoGfK9PyoTyFAgrYVkBYTuHPjglA4gY9Q_k9RtyeZGDgZdSvTBqedrYRZf3gZopRkm6n5c3YOKSsD1hewXfEPL1U0cokOwwn3C1uYnHFFecfP2Ia7eXDdtBSV-cXlj7Bn3_IZDfvW-_-sfyU7t4Rwz8tK-wH7_ev0-y9Pr-frcghYE7BNkL011mROzvA5p5oNgWfK_aMONJmYAdOqiVEe7hetrN068XZwRhQA0DNirCsbVuAK2-4JsjjaTHV5Phjf-rZps2VVqJFW6TvMiSNOEpX_VbJgVPOMWMSynLtuVZXTGe50VZYsPqaqW2jLKUJmlCWVIkfIMVtnWTNxmvW5GWGeEUB6H0RuvzEAu2Ut5PuM0pp3SlRY3aP30EuG00WtdT5wmnWvngX9yCCnr-XNjtnOxzHptLtr99KlIEyO3VqL5wNi5HZ2uNA9y-rq8dLwZ_Xd_V5PT2m-uf-9alWcUALz_r0dnPKANhxzlJHydAzPPPAAAA__8T47KS">