<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/60208>60208</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86] Missing rCX use/defs from LOOP instructions
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:X86
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          RKSimon
      </td>
    </tr>
</table>

<pre>
    ```
// Loop instructions
let isBranch = 1, isTerminator = 1, SchedRW = [WriteJump] in {
def LOOP   : Ii8PCRel<0xE2, RawFrm, (outs), (ins brtarget8:$dst), "loop\t$dst", []>;
def LOOPE  : Ii8PCRel<0xE1, RawFrm, (outs), (ins brtarget8:$dst), "loope\t$dst", []>;
def LOOPNE : Ii8PCRel<0xE0, RawFrm, (outs), (ins brtarget8:$dst), "loopne\t$dst", []>;
}
```
LOOP instructions decrements the CX/ECX/RCX register (depending on encoding) and LOOPE/LOOPNE also reads (but doesn't write) the ZF flag.

Also, we're missing the LOOPNZ/LOOPZ aliases for LOOPNE/LOOPE
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyslFtv2zoMgH8N_UI0kOVrHvyQm4FzTs9apAMa9E2xGEebLAWSvG7_fpDjrbv0YQMKGLJMiuTHiyy8V70haqBYQ7FNxBjO1jX7_x7UYE1ytPJLAyWbH7YFtgLeAm_x1toLKuODG7ugrPFXraaAyq-dMN0ZIdtiCnyDyr8nNygjgnUv0ofuTHL_OAmgWD86FejfcbhAsUVlEKr11aekE97e3d0jImQr_EfV95s9acg27POOR0978dy6Ie6A13YMHvhy_lLG49EF4XoKNWQr4Ln04buea2svUGzCN_nk71oNyHaQ_cKwe40hfQMG-guId7tXINgbQJg_oYBqO29-HoypRT9OBErqHA1kgsdwJtwcgLe7ad1vDuioVz6Qi3CSLmSkMj1ag2Q6G_fAlyiMvNYdeDunLrS36EhIHy2PY0BpyRvgVcDnOEPRLsZ7avGkRb-Yaad1pb2NaT0T8MoRDsr7GDaen_w_zYGeUGglPHk8WTdXfVbtEtlkcpktRUJNWlZ5zlhZV8m56QqeirzMCy55UVC-THnNKlF3RXVK01OaqIYznrGU87RIa1YtlvWScZExVsqyElRDzmgQSi-0_jQsrOsT5f1ITck4qxMtjqT9dFk5P4ruIxkJ2epQl7FbxTZxTbS7OY69h5xp5YN_8RRU0NNNj-eLLf4_5-42Bxw9AW8lnTyenB3wt2Ymo9PNOYSLn2Yn_gN6Fc7jcdHZAXgbo8yvm4uzH6gLwNsJ3gNvJ_6vAQAA__-8I0s3">