<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/60019>60019</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AVR] Branch offset zero in assembler output
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          gergoerdi
      </td>
    </tr>
</table>

<pre>
    I started digging into #59962 and #47093 to figure out what exactly is broken, and it seems that as of 5fcdf7623f413aa5985252eb93ecd72efe6b485a, branch offsets are in general mis-assembled. This can be demonstrated with very simple, very small inputs.

First, assembly with `llvm-mc` from hand-written code:

```
        .text
        cpi r24, 42
        brne .FOO
        ret
.FOO:
        rjmp .FOO
```

I have tried assembling this with `llvm-mc` thus:

```
$ llvm-mc --arch=avr --mcpu=atmega32u4 -filetype=obj foo.s -o foo.s.o
$ avr-objdump -d foo.s.o

foo.s.o:     file format elf32-avr


Disassembly of section .text:

00000000 <.FOO-0x6>:
   0:   8a 32           cpi     r24, 0x2A       ; 42
   2:   01 f4           brne    .+0             ; 0x4 <.FOO-0x2> <--- HERE
   4:   08 95           ret

00000006 <.FOO>:
   6:   00 c0   rjmp    .+0             ; 0x8 <.FOO+0x2>

```
At the marked line, we see that `brne .+2` (pointing to `.FOO`) has been mis-assembled ito `brne .+0` (a nop).

For the second test, we can write LLVM IR and try compiling that with `llc`:

```
target datalayout = "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8"
target triple = "avr-unknown-unknown"

define internal fastcc i8 @foo(i8 %x) {
start:
  %b = icmp eq i8 %x, 42
  br i1 %b, label %bb1, label %bb2
bb1:
  ret i8 12
bb2:
  ret i8 34
}
```

If we ask `llc` to produce an assembly file, that one looks correct:

```
$ llc -march=avr -mcpu=atmega32u4 -filetype=asm bar.ll -o -
        .text
.set __tmp_reg__, 0
.set __zero_reg__, 1
.set __SREG__, 63
.set __SP_H__, 62
.set __SP_L__, 61
        .file   "bar.ll"
        .p2align        1                               ; -- Begin function foo
        .type   foo,@function
foo: ; @foo
; %bb.0:                                ; %start
        cpi     r24, 42
        brne    .LBB0_2
; %bb.1: ; %bb1
        ldi     r24, 12
        ret
.LBB0_2: ; %bb2
        ldi     r24, 34
        ret
.Lfunc_end0:
        .size   foo, .Lfunc_end0-foo
                                        ; -- End function
```

However, if we go to object file, we have the same problem that the branch offset in `%bb.0` becomes zero:

```
$ llc -march=avr -mcpu=atmega32u4 -filetype=obj bar.ll -o bar.ll.o
$ avr-objdump -d bar.ll.o

bar.ll.o:     file format elf32-avr


Disassembly of section .text:

00000000 <foo>:
   0:   8a 32           cpi     r24, 0x2A       ; 42
   2:   01 f4           brne    .+0             ; 0x4 <foo+0x4> <---- HERE
   4:   8c e0           ldi     r24, 0x0C       ; 12
   6:   08 95   ret
   8:   82 e2           ldi     r24, 0x22       ; 34
   a:   08 95   ret
```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzEV92OozoSfhrnpkRkzE_gIhed_tkZaVbnaHZ1blsGCuJusFnbdNLz9CsbAiHT03Oz2tNqAeVyfS676itXuDGikYh7khxI8rDhgz0qvW9QNwp1JTaFqt73X8FYri1WUImmEbIBIa0CwqIkz1MGXFZOiHc0j8AqqEUzaAQ1WDgduQU889K27yAMFFq9oiTs3hsJCwaxM2DdNG5A1ZDUZVXvUhbVcRhxnuRZwhKGRR5hWe0Y1pgWcZZwh1FoLssjqLo2aA1wjSAkNChR8xY6YQJuDHZFi9UW_n0UBkouoUCosFPSWM3dpk7CHuEN9TsY0fUtOuRR7HjbgpD9YM2W0AdC78bnk9DG-k2M8O8jBklp2751QVeSlEKtVQdHLqvgpIW1KKFUFZLo7hqJpHT6nwbzrcWzHSWY_spegGaxWzBm88RCS4Tt0x9_rCdrnKy96rLarH3p-iujn5Z3z69w5G8IVgusLjt0QbfuAD_YqD0O5jfbYjFMBhAEXJdHEj3wNw1B0JX94ATbYcMjNsQQ1KJF-94jiR5U8QK1UlsDgRo_tmqB5G86UMVLNXQ9BNWN3j8vQ9F4AA4ZaqU7l5RtHbGAv-mV3_75IMwcWFWDwdIKJWGMzHqjdPoDEt27Yw3oOSXR4_W5Uy_kGYeITVEgNC97QWg-RZWemZtCosMcYABgoyENoY4XQxd2lyaEHeg86CzpOb7ygpHo0YlBEMCXx--PM2o8oWaQJwvqnDWrbaUXwJstpRMGhZJ665eu_4VP2QzBDqNXn-TJnQV7ROi4fsUKWiE9F0_oqsRYI0hKx7wn7MBc8hGW9UpI6xNUOb1fLKWE5XDkBgpEuS4FIMaJMxCdgDhI1ROWr7mutHfKYKlkBRZH5p_Q1xJHbYRv3_76J3z97mua1e9Qqq4XE2e4veKM48vnVLFcN2ih4pa3_N2VUBI9AGEMgz_DoCfRXehOPwtENr4uYsTGdxr7dz3J9STLLODugzC2Wshq0bd4WcQxapCvUp3k5T0bjM8KayFdmbWoJW-h5saWJYgMSExrpQjL3DdLzi4AZHcYzfwFcpVChCWFX1SUXQ_4H5iN7q8oUGgQoZ_rxlteYOulIryRJwunWNbQaB1sOCvZz8oonja3e_isItYu3ty8LlF0ydZrVQ0lApfLReBKjHPOB15JhFapVwOl0hrL2-rxYZksIeiuS-TnFZKbDgqut23rSmTw0TWyNWjh-dl2_bPG5vnZV5yV6gdqtejCle5f3x__MY6n0Vrx5_OXScFuFd8mRbj44w-G5oSx0d2rvMq3PeOtaCSheQif_7mqEgRwwEZIqAc5lmaXeMvO3cnQ3CfjvcvKadZ8JbjrwOFMGTsaOtml0pZebovfeEFYMmb1ZeFVSb-5qJ1f3w4H-sxulwtnb8bEvli11RVauKAt9_uEd23OPjafs3xl7s7lGWV1XZHyrRE_ltODq1nBfFa_O52bWD3KCtYx-JBkX9QJ31C7VYXnW6McyVTxgqWdeXXCqTtxJZl36EhYtNiNhHOjq6bQ9YP-Mhgjm1IosFQdGnA5_7-no2tYFjqOX5-0LDcTxjp1Gfu_NC2eDn9nv-IT7UDP8dKwfNyxZCUgXXBXCU7P9H6CDdlPbYpvda5zHwCyCZQBsl-CuhLlQS8EAgD-K9A5ezbVPqryKOcb3IfpLkrTOIp3m-M-y2hchWGYVGlZZhHmeV7wiIcJTRjDON-IPaMsomEYUxYn8W67y8oq22UJJmGYhwmSmGLHRbt13fRW6WYjjBlwn1Ia5ht_IZrLbzm99y13MTSGxLQVxprFzArb-l99d399J8kDHFakcdxwzLm0TNr9lusHuxl0uz9a2_t-nz0R9tQIexyKbak6wp4c_PQKeq0ccQl78i4awp68l_8NAAD__4ZZ7OM">