<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/60009>60009</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            x86 backend does not generate optimal code for shl
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          lucic71
      </td>
    </tr>
</table>

<pre>
    Hi,

Given the following IR:
```
define i32 @f(i32 %a, i32 %b) {
  %shift = shl i32 %a, %b
  %cmp = icmp uge i32 %b, 32
  %r = select i1 %cmp, i32 0, i32 %shift
  ret i32 %r
}
```

the generated code by the x86 backend is:
```
f:                                      # @f
 mov     ecx, esi
        shl     edi, cl
        xor     eax, eax
 cmp     esi, 32
        cmovb   eax, edi
 ret
```

as per https://gcc.godbolt.org/z/xsY3jqjMn. The respective IR does not trigger Undefined Behavior as demonstrated by https://alive2.llvm.org/ce/ so the optimized version of the x86 code should be:
```
f:
        mov     ecx, esi
        shl     edi, cl
 mov     eax, edi
        ret
```

Lucian

cc @nunoplopes 
</pre>
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