<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/59048>59048</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[AMDGPU][MC] Assembler accepts 2 different literals for instructions with mandatory literals
</td>
</tr>
<tr>
<th>Labels</th>
<td>
bug,
backend:AMDGPU,
mc
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
dpreobra
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
dpreobra
</td>
</tr>
</table>
<pre>
For instructions with mandatory literals (`v_madak_f32`, `v_fmaak_f32`, etc.) assembler does not count these operands as literals if they may be interpreted as inline constants. As a result, assembler does not trigger an error when a different literal is specified for src0, thus allowing to use two different literals with these instructions.
An example of a failed test for GFX11:
v_fmaak_f32 v2, 0xaf123456, v5, -1
Expected output:
error: only one unique literal operand is allowed
Actual result:
v_fmaak_f32 v2, 0xaf123456, v5, 0xffffffff ; encoding: [0xff,0x0a,0x04,0x5a,0xff,0xff,0xff,0xff]
A fix is pending.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyNU01v4yAQ_TX2BTXCOE7igw9ps-2p0l5W2luF8WCzxeDlo0n-_Q6O203VdrWWBcwH8948oLXdubm3jijjg4siKGs8OaowkJGbjgfrzkSrAI5rTzK2yzb05WnkHX9-kiVDK2N3ZHbKkb9zQhCrjNWEew9jq8GRzoInxgYibDSBhAE8EDthbdN5zPsLpGSKnpHDmbSA5NA_OQjQpTRltDKAVZAzN8GvyB63Ewc-6pCgP4EMTvU9Orgh4Bw2fBzA4KZOSQkOkM4CTpQnfgKhpEI0iZneibmhMESE0doelelJsCQi_XC0H2ssCl4avFZ2ldFDRveXcY9UTnycNIogkYrkSiNkAB9m3If7n0WRlfvrPQS_K6nJbLPEjp64LFi5rjbJeqnSeFNc7_12wraShDaGKYZPKs_KoJ9Yo884AIlG_Y7wps1yWEmjWQjo3jUkQsSk5Rz-Tfxr0vQkl49k5S0BI2yHgidaWXWbophFT5RfpvU8VRdriX2YqsM7nkSqU-phApNKL6eSQ1NsNrtNXVK6zrum7Oqy5nlQQUOD0PvHw8P3H6lWdft4hzNeu9d7xoWAKXjCPrsM8j_fVx6dboYQJp_EY_f495gZ25WwIxpav7xON5Ozv_A00VTeR_C4qGq63uVD0_J1Ldstr7ncyYKWVc0kbUuoYAuC1TLXvAXtU0sZY23scZxfMRpcPKMmCL80-xYZRVpXh1w1jDJWFMW2KCtKy9W23ggotzWvoGxpucvWFEa8yqvEc2Vdn7tmpoxIHoNaeXyyb0F8q6o3AAudDp-5bR1f0HgMg3XNqzefm23mTv8AXCiCLw">