<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/59048>59048</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU][MC] Assembler accepts 2 different literals for instructions with mandatory literals
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            bug,
            backend:AMDGPU,
            mc
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            dpreobra
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          dpreobra
      </td>
    </tr>
</table>

<pre>
    For instructions with mandatory literals (`v_madak_f32`, `v_fmaak_f32`, etc.) assembler does not count these operands as literals if they may be interpreted as inline constants. As a result, assembler does not trigger an error when a different literal is specified for src0, thus allowing to use two different literals with these instructions.

An example of a failed test for GFX11:

    v_fmaak_f32     v2, 0xaf123456, v5, -1

Expected output:

    error: only one unique literal operand is allowed

Actual result:

    v_fmaak_f32 v2, 0xaf123456, v5, 0xffffffff ; encoding: [0xff,0x0a,0x04,0x5a,0xff,0xff,0xff,0xff]

A fix is pending.

</pre>
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