<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/59018>59018</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            llvm: single-func C program hold pro/epilogue unnecessarily on some archs
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          HeliC829
      </td>
    </tr>
</table>

<pre>
    Clang will add function prologue and epilogue on mips{,64} even for a quite straight-forward single-function code, while on other archs, or GCC on mips{,64}, won't.

Specifying `-target amd64` on amd64 host also shows the same issue.

## Reproduce code

```c code
#define int64_t long long
#define MUL64(a,b) ((int64_t)(a) * (int64_t)(b))

int MULH(int a, int b){
        return MUL64(a, b) >> 32;
}
```

## LLVM

```bash
clang version 14.0.6
Target: x86_64-pc-linux-gnu
Thread model: posix
InstalledDir: /usr/bin
```

```bash
clang -O3 -c a.c -target mips      # <-- !
clang -O3 -c a.c -target mips64    # <-- !
clang -O3 -c a.c -target amd64     # <-- !
clang -O3 -c a.c                   # default to host target
clang -O3 -c a.c -target armv7
clang -O3 -c a.c -target aarch64
clang -O3 -c a.c -target ppc64
clang -O3 -c a.c -target riscv64
```

```bash
llvm-objdump -d a.o
```

### mips

```objdump
a.o:    file format elf32-mips

Disassembly of section .text:

00000000 <MULH>:
       0: 27 bd ff f8   addiu   $sp, $sp, -8 <MULH+0xfffffffffffffff8>
       4: af bf 00 04   sw      $ra, 4($sp)
       8: af be 00 00   sw      $fp, 0($sp)
       c: 03 a0 f0 25   move    $fp, $sp
      10: 00 a4 00 18   mult    $5, $4
      14: 00 00 10 10   mfhi    $2
      18: 03 c0 e8 25   move    $sp, $fp
      1c: 8f be 00 00   lw      $fp, 0($sp)
      20: 8f bf 00 04   lw      $ra, 4($sp)
      24: 03 e0 00 08   jr      $ra
      28: 27 bd 00 08   addiu   $sp, $sp, 8 <MULH+0x8>
```

### mips64

```objdump
a.o:    file format elf64-mips

Disassembly of section .text:

0000000000000000 <MULH>:
       0: 67 bd ff f0   daddiu  $sp, $sp, -16 <MULH+0xfffffffffffffff0>
       4: ff bf 00 08   sd      $ra, 8($sp)
       8: ff be 00 00   sd      $fp, 0($sp)
       c: 03 a0 f0 25   move    $fp, $sp
      10: 00 a4 00 18   mult    $5, $4
      14: 00 00 10 10   mfhi    $2
      18: 03 c0 e8 25   move    $sp, $fp
      1c: df be 00 00   ld      $fp, 0($sp)
      20: df bf 00 08   ld      $ra, 8($sp)
      24: 03 e0 00 08   jr      $ra
      28: 67 bd 00 10   daddiu  $sp, $sp, 16 <MULH+0x10>
```

### amd64

```objdump
a.o:    file format elf64-x86-64

Disassembly of section .text:

0000000000000000 <MULH>:
       0: 55                            pushq   %rbp
       1: 48 89 e5                      movq    %rsp, %rbp
       4: 48 63 cf                      movslq  %edi, %rcx
       7: 48 63 c6                      movslq  %esi, %rax
       a: 48 0f af c1                   imulq   %rcx, %rax
       e: 48 c1 e8 20                   shrq    $32, %rax
      12: 5d                            popq    %rbp
      13: c3                            retq
```

### (no target specified, default to host target amd64)

```objdump
a.o:    file format elf64-x86-64

Disassembly of section .text:

0000000000000000 <MULH>:
       0: 48 63 cf                      movslq  %edi, %rcx
       3: 48 63 c6                      movslq  %esi, %rax
       6: 48 0f af c1                   imulq   %rcx, %rax
       a: 48 c1 e8 20                   shrq    $32, %rax
       e: c3                            retq
```

### armv7

```objdump
a.o:    file format elf32-littlearm

Disassembly of section .text:

00000000 <MULH>:
       0: 11 f0 50 e7   smmul   r0, r1, r0
       4: 1e ff 2f e1   bx      lr
```

### aarch64

```objdump
a.o:    file format elf64-littleaarch64

Disassembly of section .text:

0000000000000000 <MULH>:
       0: 28 7c 20 9b   smull   x8, w1, w0
       4: 00 fd 60 d3   lsr     x0, x8, #32
       8: c0 03 5f d6   ret
```

### ppc64

```objdump
a.o:    file format elf64-powerpc

Disassembly of section .text:

0000000000000000 <.text>:
       0: 7c 64 18 96   mulhw 3, 4, 3
       4: 7c 63 07 b4   extsw 3, 3
       8: 4e 80 00 20   blr
                ...
```

### riscv64

```objdump
a.o:    file format elf64-littleriscv

Disassembly of section .text:

0000000000000000 <MULH>:
       0: 33 85 a5 02   mul     a0, a1, a0
       4: 01 95         srai    a0, a0, 32
       6: 82 80         ret
```

## GCC

```console
$ mips64el-linux-gnuabi64-gcc -v
Using built-in specs.
COLLECT_GCC=mips64el-linux-gnuabi64-gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc-cross/mips64el-linux-gnuabi64/12/lto-wrapper
Target: mips64el-linux-gnuabi64
Configured with: ../src/configure -v --with-pkgversion='Debian 12.2.0-5' --with-bugurl=file:///usr/share/doc/gcc-12/README.Bugs --enable-languages=c,ada,c++,go,d,fortran,objc,obj-c++,m2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-12 --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --with-sysroot=/ --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-libitm --disable-libsanitizer --disable-libquadmath --disable-libquadmath-support --enable-plugin --enable-default-pie --with-system-zlib --enable-libphobos-checking=release --without-target-system-zlib --enable-multiarch --disable-werror --enable-multilib --with-mips-plt --with-arch-64=mips64r2 --with-madd4=no --enable-targets=all --with-arch-32=mips32r2 --with-fp-32=xx --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=mips64el-linux-gnuabi64 --program-prefix=mips64el-linux-gnuabi64- --includedir=/usr/mips64el-linux-gnuabi64/include
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 12.2.0 (Debian 12.2.0-5)
```

```bash
mips64el-linux-gnuabi64-gcc -O3 -c zz.c -mabi=32
mips64el-linux-gnuabi64-gcc -O3 -c zz.c
```

### mips

```objdump
a.o:    file format elf32-tradlittlemips

Disassembly of section .text:

00000000 <MULH>:
   0:   00850018        mult    a0,a1
   4:   03e00008        jr      ra
   8:   00001010        mfhi    v0
   c:   00000000        nop
```

### mips64

```objdump
a.o:    file format elf64-tradlittlemips

Disassembly of section .text:

0000000000000000 <MULH>:
   0:   00850018        mult    a0,a1
   4:   03e00008        jr      ra
   8:   00001010        mfhi    v0
   c:   00000000        nop
```

</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzlWd-TmzgS_ms8Lypc4ocxfpiHiSe5vapJZSubvXtMCRC2EoEYCcZO_vrrlgDDDJ7xJpOtqzuKwhh1f2p96m5aIlX5t-utZNWOHISUhOU5Kdoqa4SqSK2VVLuWE1blhNfC_YGGUtRmsX6zCLZxtFjfEv7AK1IoTRi5b0XDiWk0E7t948HDA9M5MaLaSe4N0JnKOaiTw15IC6maPQd9ne0NPgesf2y3M31ZJVUtgnWzXNDbBb1x1z9qnoniG3RDFjH1GqZ3vCGszEErpghk78leGXgsjSJmrw6GQLfEsJITYUzLJ5CLIISTfOTAQ95m3Bk9FoipO7NxUxDmvBAVIFZNHH1uiFRgFF4eC7z_8w6sCxIGg0oXwYbAPZydHjxwbfj8hjxuSO3PZmwPtCPmb06UICwaQawoUGiFSHdo3rS6mthAnBHhWzhJGCzCTgVpnw54hqa7u3-9nyUnZWbvHmXWzx64NugCfrSky9i1fLLTtQhvyDGJP8eRV2eeFFV79HZV24nsNWc5KYFoiYK1MuLomv5ZmYZJyfNbobFpEbxrjYZrKqrnDD9nofchJF5G2DIjvSOhFzrecKyLcOt5cOdfoAU-9xe1nKNeqvX0QC3wMNbKhjTKebyDfqljXT6sX5LBEAWPeV6qrrMXZbQw2UMvdekESflQeir9krdlTbwcANWLrol82CwyB91huaeIFtoIKTAtQfIqWUO4LMLAe4xwKwwzhpep_EZUQQx3iW3Z8CM68liUdgfOpY1PjLCbSThS7DdYkxTSb0GKBB5BKhatnc7I1Bidw42XDEjBG3ospkeC8GPsCLFZQdKCgA0UXcsceleJtI38yKYei7-ZKCe9MrfKdKpcWHvoOeUMlWlIGCUFJcEKHpXqgU-UneJIy7dcQE8swquPXJToy05r1SlFE52o00EFe4JOsRedTjCRTTqrMkp48sSqgetiapUdSzIhQl5KREB75dMUyEunIIg6e7ntliIfX_RYeSycnBypFz7vSFM_OjnOBcE0BO6PhBMk-FcIp0vDKh7CCict7-iYCSs_fi6u6GxcFcOkItUmfzSpybNxVUzj6qT8_xZX-TSuLiXCxVU-mQJ56RT8QFzFfVz5z3vSI0fy6aWR5erVnwosKKC8KcYvDK3Vijxz1K3Z31s2VzqdzDrxUTtKSLIh_AwG-M496bR7fp_gRB1ODG5XnMUx8t7i8Fz0ONlxgrMe4cQv45gBh01xWIdDC3xpZv4MjoCg61kBK-ZxeIcDCBhLdAbH7HXHTwS1-iyMH9hJyucH5I5a1QPNU3L9ELWz8DltWEXcX-TZEISV6spQYuxiTfAczZ4vVbtQmC5w_suj4RX8MHwlP4xfyQ_Zq_ihc-dX8qTRKuVHa3kpmkZyAPrFBb3v4_t5Be_DNRJVAuM4Uoosad9e6dN05nMsDIKCcJy29OiapL6MnfH67EejpuPnKdQvDJ4gIesMPWyTWq5aiVxBUYobPparwwxXgFvkJKYkR-eSxr2_j5ZhpwukhJM6xZVeUKTAq39VkDx2zncRu6N17Y9yW6sD13X2iqx2cvO0AqdxhMXeBscJrO4PkGTccmMLd08YRYWQUKh0cJUCyKZTCJ-SGHGS2OLJJoa0d9HHob1cLi9id7oj8FO-a6H-Js8NQ5KsCFsRGjiKbROzPsis57I5z_XJ5lT5GM3ESMteH7mtTelJgIyPcuaLxOI-6iyjmaqMksOuZdQt67g87byxVACjuywjXkfmn7iRS9JWyMYTlX2Rm25ytx_u7t5uP33G_sLbZ8Cm4nefPnz-98eb339_-xHUhq07KVK4grSXaWUM3J9BhBYoc0ChUd5Bs7rmnRee9hTPaTo7VFWIXat5Tg6i2aM8uGvwzugMrlnfCgwQz0MJr_666_YwrcHrW54KVkGxtQyW1IN11LqXTFtQlSCFboq-E7xzpxuj2TPN4TdXWTdWO5KPb29u379dvml3BoB4xVLJPdxFa9mOG0AD6S3LcXEDd2_sud0puGA9BcHQaFbBHYRM5n68k1wZAGateSGOA929uWhByb4o7XXj81QF4YLyaqdZ6Zm2cHpg6Mk0O4x8ZKqovnLtoZPknsAGmEx-5FmO27OTKe56Vi16UybbnOceTBoG5QmvsTu_OHC75-vwZrE6hUqafkjmm9FKNU70JJFJlTGckltwhrHlqWny7Hj0cg5zN9fQiBLVvvGhi65-HcmAd4FIxQ8nAOjGaytx33LcvYTkA005pKQOXDTl9IFhlWjEd66nj-9blkOq288_hfmpa5j-U7e1bHcQpsP_3tZa8BFDDS-97xMG4U-9V6kyXrbn2VeIeRiQ5lATGD6aM1eqz0Pg1oLACmJkK7z5tNKPZE5uYDeFwOam_4_qWL736UQHgySsvfE5rClOfmKtQT9hUDuMIfBbhoUIgxNEUbvnx-PIL-ZGax0ZBd2niSGJQBMuWOZbug33s4lwFFVDNJ7LmSDbR8fU68-nxE6-y4TnP5384TwGwhfyMMlUCcYY-3mGyZ3SwFNpUMXO7Xfwb6eGr4ThO47Ne7jAe5IIN8-9nZ5u7j_7AnIfEL5_xy8IpYuw_gV5od7Fe5s_t7iA7Ju7IuTXfTKgrndKkxWldifPHv12nq0fmD-IR514yBFzEO93u0ZbXUkPDLDUHyqNfs_v4VTIZCdJa2h3VKq-mOefLfVelen_Ocav-LUfx8kq8X26usqvw3wTbthVI4Cva_yOhnCj7_JkS7qMRPZK5vgHEsnw2b-tKp5BbmBaIKlQ-6mSuw_2V1DkXO-bpjZDjbODzNGmS0go-HLGztwPJj18_WGKwg_uWNitNkDo1f6a0TDmMWXZhoVhmq_ZJovjeJPQzZquIu5fSZZyaa4XKyhkAny9Wgi4X6xur8R1QIPA9_2YxtGKrpbrPNmkfrIJeJjQFcsWEeUlE3KJdiyV3l1pSwNWaQYapTCNOTWC_4hdxbntDvBZC-88ff0bl2KbBJsr2_e1tf0_IFfYTQ">