<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/58990>58990</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64] Add a scheduling model for Neoverse N1
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          atdt
      </td>
    </tr>
</table>

<pre>
    Currently [the scheduling model used for the Neoverse N1 is the Cortex A57](https://github.com/llvm/llvm-project/blob/65f99928654869ea17aad00f2c5209f4a5f9d1dd/llvm/lib/Target/AArch64/AArch64.td#L1281-L1282), which is not an exact match. It'd be helpful to have a scheduling model for the N1 that matches the hardware exactly. 

cc @david-arm , @alexander-shaposhnikov
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyVUcuO2yAU_Rp7g2IBMbZZeOEmqjTSqKv-wDVcG1piIsDJ5O-LnU5npKqLSui-ORzOHb1-9Kc1BFySe5BCfEkGSVQG9ersMpOL1-jIGlGTyQeydb-hv2GIOWDExr108iHhGxlEW4hzwTuT0jUWx6HgX_OZbTLrWCl_yYlzt3d3uAb_A1XK6ej8mF0jJikl7xpRd41EYC2ApnTiSnAqpxpyXzOtP-HY7d53CDNuOMMQlGnqj6hKefj4ynjHDpvlBZcFP5G7scps9BefCCwE30AlcoGkTEVeMlSryYjEoLtOqyPJEwM3JPC3Nn9kYdnBbwx86mIg6DsEfMK7R0UKei7o8LRKkaKmGm5WHyBcyMYrF8Dl6UVjOEQDVx_NYn_6W4k9a5qubo60pqXuj1oeJZTJJod93tv7z8WZDFr_i-in3ZVrcP1_L8rGuGLMgeikpKXpeYtas0mCnqZOAm1Fx1ndKgaMKq5F6WBEFzeKBecL3skOkeNMtbQ9p5wzxmrORMtp1ciaMoqjqNUku6bJeuAFrKs2HpUPcxn6ndK4zjE3nY0pfjQhRjsvuCuy4cOajA89JJ3K_d1-5_0LSjbxkw">