<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/58844>58844</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU][MC] Assembler incorrectly handles SGPRs with VOP3 VINTRP instructions
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU,
            mc
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            dpreobra
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          dpreobra
      </td>
    </tr>
</table>

<pre>
    VOP3 VINTRP instructions should only allow VGPRs as src operands. However assembler also accepts SGPRs or crashes while attempting to handle them. The issue may be observed on GFX8-GFX10.

An example of failed test:

    v_interp_p1_f32_e64 v5, 0.5, attr0.w

Expected output:

    An error message.

Actual result:

    UNREACHABLE executed

A fix is pending.

</pre>
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