<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/58853>58853</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [avr] Tools won't understand their own assembly code.
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          sprintersb
      </td>
    </tr>
</table>

<pre>
    Compile the following C module with
```none
> clang --target=avr -c -save-temps
```

```c++
int r25, x;
void foo (void)
{
    r25 = x;
}
```

This will throw 4 errors at you:
```none
*.s:8:11: error: invalid operand for instruction
        lds     r24, x
                     ^
*.s:9:11: error: invalid operand for instruction
        lds     r25, x+1
                     ^
*.s:10:6: error: invalid operand for instruction
        sts     r25+1, r25
                ^
*.s:11:6: error: invalid operand for instruction
        sts     r25, r24
                ^
```
The generated assembly code is all fine:
```none
foo:
        lds     r24, x
        lds     r25, x+1
        sts     r25+1, r25
        sts     r25, r24
        ret
```

* The 2nd operand of `lds` is an absolute address, hence legitimate operands are: symbol, symbol+offset or integer.  Hence its obvious that `x` names a symbol, not a register.

*  The 1st operand of `sts` is an absolute address, hence legitimate operands are: symbol, symbol+offset or integer.  Hence its obvious that `r25` in the 1st operand names a symbol, not a register.

</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJzFVNuS4iAQ_Rry0qWVkIvxIQ-jztR-wPwASdqELQIWEB3_fpuopXG3Zi81VZtChAb6nNN0U5v2XG3NcJAKwfcIe6OUOUndwRYG045kPknfs3jH4hdWxJemjcarKX2FRgnav1h4YTv0LN2Jo4VFAwsnjrjwOBzc0_nrdG5sGN-ENlml9mB5zvgWPlh6NR6NbImhAcbLMGZ8ffWxuu4A-ugYEImHc2y1-4TAey8diVSKAmDNCTJAa411IDyczcjSZ6IP6vnL0tGGkn5JQt3laBhIfRSK6JoDWqEDbUs25-3YeGn0nW74VOvgQj27KJ6tzj6Wv86x11-GfY023yR_g5_E1BX_ju_8Az5BE4cw_CWDn8GTLwTfTvH_DfA8g96pZDrUhOSxBeEcDrU6Q2NaBMoqQUm1l5Qtn-QQ5fN9OV7TdVA_T4QH8_MdkZE03JaewjdffJAXTFSpnxQlf4Ggjet7IM0eaFcgUsSTOA2idkaNHkG0rUXnAkiPukFQ2EkvBwrL7TwdsCEQ4M5DbVTYehttzH7v0MN0Ux47tEuAb5MfSRdk6qM0o6PypIok8I9AQIsByeWDN208zS0BO08enuVMehLnn_SEAP1nPeF2AgU9vcCPFP9QZIRVUhSrMsvzdRm1Vdqu07WIvPQKK5Zv6D1m-Q7ejVH00lEN8JWHUbdonQ8wBCstmJOeZ_AyGq2qeu8PodQYf6NGUejHetmYgSZKHW9_i4M137HxNJXOjUihe8vLMk-jvlo1ZZEl6SprBYqixqzeZzWmbZYX-zpHESlRo3KBKeNc4wkmFzQm1pGseMx5ksSrpORFWi6LMs9Kgfm-XrXrNk9YFuMgpFoGHktju8hWE6V67BwtKgqVuy-SRNlpnAIT_IvR98ZW7mDDXVlXRxN6NbH_AfQlEi4">