<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/58507>58507</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU][MC] Broken identification of unsupported opcodes
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU,
            mc
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            dpreobra
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          dpreobra
      </td>
    </tr>
</table>

<pre>
    Identification of unsupported opcodes is broken. In many cases, assembler fails to identify unsupported opcodes and reports an "invalid operand" or another irrelevant reason.

An example for GFX11:

    v_add_co_ci_u32_sdwa v1, v1, v4 dst_sel:DWORD

Expected output:

    error: sdwa variant of this instruction is not supported

Actual result:

    error: not a valid operand

An example for GFX10:

    v_add_co_ci_u32_e64_dpp v5, s6, v1, v2, s3 dpp8:[7,6,5,4,3,2,1,0]

Expected output:

    error: e64_dpp variant of this instruction is not supported

Actual result:

    W32: error: operands are not valid for this GPU or mode
    W64: error: invalid operand for instruction

The root cause of the issue is that opcode aliases are defined without specifying a variant (Default, VOP3, DPP, etc.). 
As a result, they are added to all matcher tables (i.e. for all variants). The contamination of matcher tables breaks identification of unsupported opcodes.

A fix is pending.

</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy1VFFv2yAQ_jX2C5rlYDtxHvyQNmvVh6rRtK17izCcE1YMFuCs_fc7iNOmVVVVkxbFxnDw3Xcfd9ca8dTcCNBedpIzL40mpiOjduMwGOtBEDNwI8AR6UhrzQPojNxo0jP9RDhz4BJ6SZhz0LcKLOmYVI54Q-QR9OldLKYFsRAWwzdJKJX6wJQMO8CiFVeIsWgzfo-o0lpQcGDa4zHmjM6SfJ3kq-N7pQk8sn5QQDo8dH31azZLitX5FoK_w5YJseVmy-V2LOjWiT-MHGaB__QuiXB-60Dh6fX93bf1OcTXxwF4DGL0w-jfcQDWGovr5IjMrAyEUU6_R_Gkdt6OPEqMU4yMPAvzKhruR6YwTjeqD70EhODmXLaPVck_oQrMy60YBnKogiRufiYPjSsFQXMdkKqLBa6EHWFviU-BT9gV9udJ9a_6PXP4TxLeFzS6Ofmb1MNctBBRj6IG2aLf682PkI095u4ZyLx8BfImg-PpM8LnHL7vgViDfjgbHRzDA4zIjeGNE-anUiEIGYosMhPQSY0C_pF-jyISh4JihUm9Iy_pltB6DR0LgeNt_bzbhDsh680mDOB5ltBlRiadEPekElqRxFN0hBmBbrCImVJY6Z6HGvQMC9wFfJlBFsML5smvi7AhMG60Z73Uz83kDUCLFfzgTv3h46bzusxJJx-DPgNogUFPxhSa2Xw-p3W9rIpUNIVYFkuWeukVNJijq9s13l9Ixuri9hJHchHb2OcYpKNVzd77wYU8olf436H8Y5tx0-NEqcNp-DJY8xtTHKfxKlGSq6qu8kW6b6qSsRnPgc-6Mi8Z1O1iwVoBxQKWUNR5qlgLygW-2PpaxpGgQI8TeRpLD4eeh-9qncqG5pTOcprP6pwWRVYs8rIQHADooi66ZVLm0GMzzgK1zNhdapvIsh13Do1KOu9ejNjB5U4DTAzEYMG0lk3e2IgZZ5vTahrja2JwfwHJn_7p">