<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/58388>58388</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86] Spilt mfence like features from SSE2
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            missing-feature
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          phoebewang
      </td>
    </tr>
</table>

<pre>
    As commented in `X86Subtarget.h`:
```
  /// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
  /// no-sse2). There isn't any reason to disable it if the target processor
  /// supports it.
  bool hasMFence() const { return hasSSE2() || is64Bit(); }
```
We need to find a way to split these mfence/clflush/sfence/lfence etc. instructions from SSE2 in case they are disabled together with vector support. I'd like to add something like `sse2_novec` etc. and set them when using `-msse2 -mgeneral-regs-only`.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJxtUsuumzAQ_RrYjEDECa8Fi6S3V-qiq7Rqd5WBAdxr7MhjkubvO4akrdQrWYJ5n3NmWtvfmyNBZ-cZjccelIGoyL5XxXlpvXQj-nRiR7Q_RtlLlB3D__ZWEyASr9uDr4QwD2g6BDXADWGSV4Tz-aMA69iOROkQrIFfVZEUB66s8IrmkSzpjccP1v3f2NiECEUk6hS-TMhNFBnu5kGaOziUxE29hV6RbDVHfejpJ4SNAVyc7ZDovd60XC7WeeKi9BltrdUMnj6_BjIMkyezRIY8ROWJB_rFmZAQuD3CUfmBHwMrDiflN2e0P7H_5V3hviEYZMIMe1CmBwk3eQ8WXTTjZ_B_1GSYnR70QhP_0dOlN6XRdykvjbxbOq8YIwzOzpvqvMtOchtudgfJsj0EClNZFlYSbspPcMXO84YeUqTwibXtQas3DIBk3wPZmfOVGTcvswgL-WEsl7KxoZBMg3DFPsNt4s0uFEo4IZlDPiTziAad1InDkRJr9J2DaYzNrijyqqoLsYv7Zt_X-1rGXnmNTZSf-Bqj_AXOF6X988JWHANKXgX-wzlenG4m7y8ULnZd8cgUlzblEw-q6evzk_BV_GTmbCqiBYl_8mpfVfHUVHXeDth2oj_kXZ3LMstF2x52ueSMsu1jLVvUFMBFQsxcz0STBxz2MNxYNSITYpftimyfldkuzQZZirzYFbKrB1FjdMhwlkqnAU1q3Ri7ZgXWLiNxUCvy9DcoecjIN7MO5f5y8ZN1zWWy2OJNmjFeaTQrh9_pWjcH">