<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/58356>58356</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [RISCV] Incorrect stack unwinding in presence of vector registers spills
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          skachkov-sc
      </td>
    </tr>
</table>

<pre>
    # Reproduction
```
#include <stdio.h>

void foo(int arr[4]) {
  printf("%d %d %d %d\n", arr[0], arr[1], arr[2], arr[3]);
}

void test() {
  // Intialization with 2 memsets leads to spilling of zero-splat value
  int arr1[4] = {};
  [[clang::noinline]] foo(arr1);
  int arr2[4] = {};
  [[clang::noinline]] foo(arr2);
  throw int();
}

int main() {
  try {
    [[clang::noinline]] test();
  } catch (...) {
    printf("hello\n");
  };
  return 0;
}
```

**Build**:
`clang++ --target=riscv64-linux-gnu -march=rv64gcv -O3 test.cpp`

**Result**:
```
0 0 0 0
0 0 0 0
terminate called after throwing an instance of 'int'
```
(Checked on QEMU ans Spike).

**test() asm:**
```
00000000000008f8 <_Z4testv>:
 8f8:   7139                    addi    sp,sp,-64
 8fa:   fc06                    sd      ra,56(sp)
 8fc:   f822                    sd      s0,48(sp)
 8fe:   0080                    addi    s0,sp,64
 900:   c2202573                csrr    a0,vlenb
 904:   0506                    slli    a0,a0,0x1
 906:   40a10133                sub     sp,sp,a0
 90a:   c2202573                csrr    a0,vlenb
 90e:   c5817057                vsetivli        zero,2,e64,m1,ta,mu
 912:   0506                    slli    a0,a0,0x1
 914:   5e003457                vmv.v.i v8,0
 918:   40a40533                sub     a0,s0,a0
 91c:   fc050513                addi    a0,a0,-64
 920:   02850427                vs1r.v  v8,(a0)
 924:   fd040513                addi    a0,s0,-48
 928:   02057427                vse64.v v8,(a0)
 92c:   fd040513                addi    a0,s0,-48
 930:   fa5ff0ef                jal     ra,8d4 <_Z3fooPi>
 934:   c22025f3                csrr    a1,vlenb
 938:   c5817057                vsetivli        zero,2,e64,m1,ta,mu
 93c:   0586                    slli    a1,a1,0x1
 93e:   fc040513                addi    a0,s0,-64
 942:   40b405b3                sub     a1,s0,a1
 946:   fc058593                addi    a1,a1,-64
 94a:   02858407                vl1r.v  v8,(a1)
 94e:   02057427                vse64.v v8,(a0)
 952:   fc040513                addi    a0,s0,-64
 956:   f7fff0ef                jal     ra,8d4 <_Z3fooPi>
 95a:   4511                    li      a0,4
 95c:   e35ff0ef                jal     ra,790 <__cxa_allocate_exception@plt>
 960:   00001597                auipc   a1,0x1
 964:   4601                    li      a2,0
 966:   7005b583                ld      a1,1792(a1) # 2060 <_ZTIi@CXXABI_1.3>
 96a:   00052023                sw      zero,0(a0)
 96e:   e53ff0ef                jal     ra,7c0 <__cxa_throw@plt>
```

This test works correctly with `-march=rv64gc` or with `-fno-omit-frame-pointer`:
```
0 0 0 0
0 0 0 0
hello
```

This bug affects 2 SPEC workloads with RVV enabled (510.parest_r and 511.povray_r) - they are passing with `-fno-omit-frame-pointer`.

We also have a performance problem here - looks like spilling of zero constant (VMV.I result) is redundant and re-materialization should be done instead, but this is a hard task due to vlen, vtype implicit operands (re-materialization works after VSETVLI insertion).
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy1V9tu4zYQ_Rr5hZBAUaIuD37YOCkQoItus9t0sS8BLVG2NrQokJSy6dd3SF18TbJtWlmQTEszc-bwkJ5Zy_J56ZEI3fFWybIrTC0bD197-IOX4PEchiSqm0J0JUdetNKmrGWw9aKb8am79rIuUSWlR7K6MYgp5dGr2KPXHsmRl14NbyHUKnhcwVseIR6hJTq-eHTVuCer0QV2LqZReDQiR6NoCOZFYywvvT4DaLg2LvYRJo_8Aie6bUzNRP0Xs0Sgp9psEUE7vtPcaCQ4KzUyEum2FqJuNkhW6C-upK9bwQzqmej45HBkIBwpANauXTxAFO2j0is4C8GajRd9gLORdQOeuc0DjAYynZuDrGbn5L9xTo6dm62STzbEwNJLZFoMO1Y351wa9Xw4fBvJfkoO4afXqGCm2MLcZEEQnAQ5ltGWCyFn4Zy4ORgpbjrVIHwhqRO9j6q351VXi3L4auFPrw_5kCs4ke8bpjbcwESoWhd9EvuQX_fD3zQd8ndMFVv7CH7fFD3yf4tczkHRthcj3nHdCXMe8hAhRu5zYWC42tUNMxz4E4KXiFXw0zCvVrWsgdnVhjUFtwr2SOomO31h4WerLS8ewQ2siN9vPv4B9hp9butHDkwH5-APFhjTOwt_yONiEodHVmV2c3n4FlsXvd1dptwRPIMBzHoaRjm6cLCyrO1dt7AduIufxLMxG4yrAieXjHU53BUDO5oAeushn82L0Twj5DVzjcE8zs7M-WAOGeJXoeMJ-ow8x3iwLQjBhKbRqW2hlXI-rG0veLOeLeMxKn0hZ9jCZkt3wT_C2TgZjGPMQhxGZ2F1t0bHbDM827J_DXkkqqBZmGKanlr2sA3X_QDbHnbvBR_2r4IDZWS1g31yZewk7rrJaUjewUM4kkg5xlF8AdGuD_qgRn1m7WarbGYvxvRl9lw0jY_YC4tZqhTT8Mx2Esse7l7nORnVgklGcUwuEBiqoEcDXLv5471MczLmWpU4fjOyQ-2D1ifjbIoM83YxMswQhL4cuXhH5GjMuWK0qjCvTo2_M-Hubm1nZTxsMRH8-32q5wIG3MSHqq1eVm14qtoo-x9UGxWTarPXVWtt3eVAtRGfNfSzfO41FJNJvGswXr8s3nAW7xw4TvbizWj-cuAZ9WFgthdvFuNzHsWJeMMDCcX8Hfqj5B180SnntHqP_uiYfUzD8NSFPSb9OAz74KNMePQT4k9z7II_FD_YA1QGEsor_sB_FLx1dX-MWyg69pCSaTeBI6T5Gaesq9tims0D-SXjUooT_Hoq5HDTTEYeUwyqo9nZJIjxT9ZFC9OcTBJAtoEhOBmS-_bltoZMVl-_fri6fQiD6DAhNidEYZWfS_tpuI8rFJ_qJBlFxmn0E2wXB2y72uuE4IsV55dtrV1tiJ6ketSokErxwojnoRmBt0-qSfgFSbV_WjXSl7va-JViO-63UGlD8ee5ufyHdeRQVL-Bdd1BQVlVgFFDq_T5083KIRfS9koO1d39PeINW9tKFBilIQ5apiDFBwWlZIlA8EEre8WeH5SdTh8qVf4M_Q1HLdPaVqxvZ3dUh_7JERNaoi3r4Rtquaqk2rl6F9pcALJDWw7ufSSkBJIF1LJnTR1Q74pkY0Hff7wPbqF7GMryHEHiipddU9rnNgnFYV4AykH3qLeyA9GuOSplw13JDQ2kbVbXnYEcwQecDFAq6EqZfkRlx217af9d7Gu9eW7BbteKuqgNkpAHhNIWz4Vwg16GUv_-882X-19vbUyu3NqGSn3Bl2GSwO4YpzhZlMuozKOcLUxtBF9Cf3Z3-3l1b9ux22ZUHYL8i0fUNdA2lJaaugECueZj59DDO6A9xTc15Kb0wKFedEost8a02hX_trHewAR266CQOxgI0U83H-bjO3iBYa11xzV8gbVPk8V2yfM8JVlWlCWtCKNZGSVhmcTriHBalWm0EGzNhbbQoetrOPSs1oXtAOn1ol7CCidQvMYhbOlxEuQ5YxVNWRymIYurElYjh_5VBBZHINVmoZYOEihaw0MBOen9Q6vETcMdU9Y_68xWqqV-ZMX2Ufa-LhYu_NLB_xtElG4A">