<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/58343>58343</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            arm64, apple-m1, LLC generating code passing float arguments in general purpose register
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          FredrikLundkvist
      </td>
    </tr>
</table>

<pre>
    Not sure if this is a bug or if we do things incorrectly.

Compiling bc code with llc to target apple M1

clang+llvm-15.0.2-arm64-apple-darwin21.0/bin/llc --mtriple=arm64-apple-darwin20.1.0 -march=arm64 -mcpu=apple-m1 --relocation-model=pic -O0 -filetype=obj xxxxxx.bc -o xxxxxx.obj

Generates code that passes floating point argument in general purpose reg x0, for example:

`mov    x0, #0xe9e2                 
movk   x0, #0xb295, lsl #16        
movk   x0, #0x710c, lsl #32        
movk   x0, #0x3fbc, lsl #48        // result: x0 = 3FBC710CB295E9E1 = 0.1111, C++ source passed a 0.1111 double literal
                                                     // also sets x1 to second arg which is a pointer
0x12f15bcfc <+40>: bl     0x12f15bdcc              
`

Callee, in other arm64 executable built with Xcode 13.4

`str    d0, [sp, #0x10]          // expects first arg in d0
str    x0, [sp, #0x8]           // second arg in x0, should be the ptr, but contains the double fp value
`

This crashes of course.

By trial and error I found that adding the flag '-mattr=fp-armv8' produces code that passes the double in d0, and everything seems to work.

If found the arm64 abi standard: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#parameter-passing
One section says
"Floating-point and short vector types are passed in SIMD and Floating-point registers or on the stack; never in general-purpose registers (except when they form part of a small structure that is neither an HFA nor an HVA)."

Is the llc code generation wrong?
If there are different target variants, should fp-armv8 be default for triple arm64-apple and cpu apple-m1?

Or is there something else we're doing wrong?

The bitcode was produced by lllvm 7.0, btw, if that matters.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyNVsmO4zYQ_Rr7QkjQ5u3gQ29OGujJAEkQ5EpRJZvTlCiQlJe_zyNpe-yeTiaC0BbJWl5VvSp2rZvT-jftmB0NMdkyt5OW4eWsHrdMG793INZof9JvcdYLbQwJp07pJHueZA_x75PuBqkgwmrBhG6IHaTbMaUEc1DmZkuO8WFQxL7kt4pC8X47KR6V2ndJPkuztEi46eZVEqSThpuD7Is8zSbFppY9_nqjSdI5IyEwKZ8_Ec9SKLCk40bsLhJYimH0qyDZ5TBiSGnBndR90gG0wukgYf0rlFupyJ0G70HX39gxPCnCS_Rlgf3bWH6hngx3ZGMG3I47NnBrsdEqDTdIz6Blj0yY7dgRPmTPtkFLsWE0g7bEDG3ZEdE-sRYFoCPvQpgPt54m86zTe4YnSk6KMjvSigr28YnyEH6_F66L1cwvlFV-I5__TGGRZ-JGoSx-plC29a1CtbwqFBu8iNOOyiEwKDEkmZWbxyd4eXoEtJfVSx42UUk83s4TWIKXWT0aQTGxDZgaJcDRsQa7lHQ-mxHUD9n4P88ZHldWM0vOsmPuOWxJ6L7xlWOHnRS72CahnGSiu-yYF20-q0UrgN3jrbJJ-eJDrFWwfZFohPisTCjrXVNxpYh87KCJdjsyLDKZjiRGx3289SiVi832d2BdXqbVB6pYZ7yPJtZm9miHa5HybDJ7_iF2Og5ocbBWGhvI6gE0Z2xna8dPrC3vjF2s3WQOZqKe3elRNaz2XYJaOuM369Ghc3rHZW_D_rmm7cD2XI30aZL-9CNLGG53aDPdwsBoLN0Np8cTw7BAi3HAIGPQVq9orhGr0KO8aXxreo-t4lvgXmB0OIAqn9vBj6P9EntsMLoZxWftfQM2ZgrRBGd7MqcwOpEF6qwn0kGb9zt4r-0VDJ0LzGvJrIMFbhpPn51zg_UzIGR0i2qPdSp0h8XD718Sq1t34AZU2UAz4dzPSqVr_HQ8zEzOB2Hn1fevFJVFzQZueEdgcOIjAc4I6WtPvmx-MDLLT_YMt8DwjXMsOc8xoEYpjWN7SCOvfmCiL8y1P5GOP16_PAfJD8oYdNLCtfUXDRz58BG0eJ-Uj6z3qbsZj8nNeDxrTYolHQUNoP-OgvrJj8wOrgEIVODMdmghGDWjcP6KCzUDX3qSsZ169uvmgfU6fv6FEFcpwrwrTyyvv3VC3SOgkJqD0chYubnW0RulEH4j2xbfCPN8-e05KNg7e8P-C7d8GzTUcozDMPPjzcZu7rWQPtxe7HJ3XZ2e62V8VNG71ShooBwp5OsAViw8IO237hFfOghjRLp4a3N7oTm684SocS-zRRoYXbtDGEZtzKNvEdQhndI6n89neGfVctqsy2ZVrvjUSadoHYII7XBBju-3t6drGgEqeD7zL96U1wvS_ssNGSgwHY1a_0dreOznnwRBfQNFsZTWjoQybGbLsiqnu3XVlBmJnDfVoi4Xi5aLckbLapZlRTGbV_VU8RqpXGPWYb5N5brAQZ7lZV7MimKZ5stmxZd5XvB5u2ibalJlhLZTqXecarOdmnXAgP-pLA4VwNvvhz7ubU90sc9Hh45abww1Rr6_YTC876ExDbjXAfQ_IQgFIg">