<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/57498>57498</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU][MC][GFX10+] VOP3P op_sel_hi encoding is not consistent with SP3
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU,
            mc
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          dpreobra
      </td>
    </tr>
</table>

<pre>
    This is a follow-up on https://github.com/llvm/llvm-project/issues/48707.

We have a patch which set `op_sel_hi` to 1 for unused operands. This was necessary to match SP3 behavior for GFX9. AFAIK, there were no other reasons for this patch. AMD documentation does not have any requirements for this case.

Now it turned out that SP3 does NOT set `op_sel_hi` to 1 for unused operands on GFX10 and GFX11. The question is: should we disable our patch for these GPUs to match SP3 behavior?

    // SP3 GFX10 and GFX11:
     v_pk_add_f16  v224, v224, v3                          // 000000000000: CC0F00E0 180207E0

    // LLVM GFX10 and GFX11:
     v_pk_add_f16  v224, v224, v3                          // 000000000000: CC0F40E0 180207E0
 
This issue was originally reported by Gleb Larochkin.
Added @rampitec and @Sisyph for awareness.


</pre>
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