<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/57452>57452</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
[IrTranslator] Sign extends index value for G_EXTRACT_VECTOR_ELT, translating `i1 true` into `i32 -1`.
</td>
</tr>
<tr>
<th>Labels</th>
<td>
new issue
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
DataCorrupted
</td>
</tr>
</table>
<pre>
This is an issue related to #57408
Given the following seed and command. Or you can see the result here: https://llvm.godbolt.org/z/dd5edjrG3
```llc PoC.ll -stop-after=irtranslator -global-isel -o PoC.mir```
```
define void @f() {
BB:
br label %BB2
BB2: ; preds = %BB
br label %BB1
BB1: ; preds = %BB2
%B1 = sub <2 x i8> <i8 16, i8 16>, <i8 16, i8 16>
%A = alloca i8, align 4
%L1 = load i8, i8* %A, align 1
%I = insertelement <2 x i8> %B1, i8 -128, i8 %L1
%E1 = extractelement <2 x i8> %I, i1 true
store i8 %E1, i8* %A, align 1
ret void
}
```
Regardless the architecture, IrTranslator will translate the index `i1 true` into `%9:_(s64) = G_CONSTANT i64 -1` (or `s32 -1` on 32bit architecture).
This has caused AMDGPU backend to crash since negative index is unexpected. (See #57408 )
Further study shows that we are sign extending the index at [IRTranslator.cpp:2811](https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp#L2811), thus given values like `i1 true`, `i8 255`, the index will be translated as -1.
We propose change `APInt NewIdx = CI->getValue().sextOrTrunc(PreferredVecIdxWidth);` to `APInt NewIdx = CI->getValue().zextOrTrunc(PreferredVecIdxWidth);` as mentioned by @petar-avramovic in the latest review: https://reviews.llvm.org/D132938
</pre>
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