<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/56708>56708</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU][MC][GFX11] VOP3_DPP variants of v_cmp*class* opcodes have incorrect src0 kind
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            bug,
            backend:AMDGPU,
            mc
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
            dpreobra
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          dpreobra
      </td>
    </tr>
</table>

<pre>
    `VOP3_DPP` opcodes allow only `VGPRs` as src operands. However, assembler accepts `SGPRs` for src0 of `v_cmp*class*` opcodes.

An example of failed test (ws=32):

    v_cmp_class_f16_e64_dpp s105, s2, v2 row_ror:15

Expected output:

    An error.

Actual result:

    v_cmp_class_f16_e64_dpp s105, s2, v2 row_ror:15 row_mask:0xf bank_mask:0xf 
    ; encoding: [0x69,0x00,0x7d,0xd4,0xfa,0x04,0x02,0x00,0x02,0x2f,0x01,0xff]

A fix is pending.

</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJydUsGO2yAQ_Rp8QY0wGCc5-JDddLeXVaNWrXqzMOCEBhsLcJL-fQc72c1We6plMTyGN2-GmcapPxUqyc-vO1ZvdzvYYjdIp3TAwlp3xq63f3C68bz7FpJbBBy8hFvai16FBf7izvqkPaKP4Au6a6z2WEiphxgS8_uN2TqfqKDQpvNTLbsB0Y20QAN7p71AZIvIZl43PdYX0Q1WJ2IrjNUKRx0iRnR1DohtGUV0jdjmnoXhmxTqKX7d5mWty6JWw4BDTnhKN9C0nij27lx75yFEzu-DfL4MWkaQc2McxviBRErOA_V9xjKOwmKvw2g_Iv1XXhPoRDgCIpcWN6I_3uO38Ig9YN3DQ5p-D06M-AO5lGuISS6ETGapJqOKybRi9s2I0PubV0TbGeUzoUV8-65i3JoLNgEPuk-y1-fIdJWXfLXkq4KxTFVMrdlaZNFEqytIa_Oyfd79SLH4w8vjbJ-ffuU5bPFtJvFJeCN6GCZo_79D8zqtB3HS2EDV3kPL5jk7ml5lo7fVIcYhpEbQJ_j3Jh7GZiFdB8Da0818Grz7DWSAJoRRQ_wnXi7JKjtUVK4bWeQl4UvVrFUuW7oqi6Lk-Yo1TJDMikbbkIpClDbjHtbUxASEPMKrgPy13FdPJ9OebzNTUUIpWVKeFznjdNEK1hRlyQXVtBB0iQqiO5j8Rcpz4fw-89WUMigFcFoTYnhzwtuYfa_1NR01eO0aL65qYowH56vbaTYVW02V_gUH0DPk">