<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/56592>56592</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            riscv_vector.h intrinsics should be target-gated, not preprocessor-gated
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          malaterre
      </td>
    </tr>
</table>

<pre>
    This is a complete duplicate of issue #56480 but for riscv-64.

Clang's intrinsics headers on Riscv-64 contain code like:

```
% head -20 /usr/lib/llvm-14/lib/clang/14.0.6/include/riscv_vector.h | tail -5

#ifndef __riscv_vector
#error "Vector intrinsics require the vector extension."
#endif
```

This means that one can only use Riscv-64 intrinsics in TUs that mark the feature as available for the entire intrinsic, e.g. via -march flags. In contrast, the x86 intrinsics are consistently defined, but tagged with __attribute__((__target__("whatever"))):

* https://github.com/llvm/llvm-project/blob/main/clang/lib/Headers/avx2intrin.h#L18

See also:
* https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=ae5e29239e28818f807cf11775c95c4243d9a256;hp=b8c7c62b2dbbdf355adb56d8250e68222ae0febb
</pre>
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