<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Issue</th>
<td>
<a href=https://github.com/llvm/llvm-project/issues/54854>54854</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>
Cannot run NVPTX backend on function in OpenMP offloading device RTL
</td>
</tr>
<tr>
<th>Labels</th>
<td>
openmp,
backend:PTX
</td>
</tr>
<tr>
<th>Assignees</th>
<td>
</td>
</tr>
<tr>
<th>Reporter</th>
<td>
jhuber6
</td>
</tr>
</table>
<pre>
The device runtime library cannot be compiled using `llc` because of the `impl::atomicStore(unsigned int*, unsigned int, int)` function. When this function is compiled it will provide the following error:
```
$ llc libomptarget-nvptx-sm_70.bc
LLVM ERROR: Cannot select: t5: ch = AtomicStore<(store seq_cst (s32) into %ir.Address)> t0, t4, t2
t4: i64,ch = CopyFromReg t0, Register:i64 %0
t3: i64 = Register %0
t2: i32,ch = CopyFromReg t0, Register:i32 %1
t1: i32 = Register %1
In function: _ZN4impl11atomicStoreEPjji
```
If this function is reduced the following IR will reproduce the error
```
target triple = "nvptx64-nvidia-cuda"
define void @_ZN4impl11atomicStoreEPjji(i32* %Address, i32 %Val) {
entry:
switch i32 undef, label %monotonic [
i32 0, label %seqcst
]
monotonic: ; preds = %entry
ret void
seqcst: ; preds = %entry
store atomic i32 %Val, i32* %Address seq_cst, align 4
ret void
}
```
This error primarily shows up when attempting to perform device-side LTO via `-foffload-lto` with optimizations explicitly disabled.
</pre>
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