<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/54793>54793</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AMDGPU][GFX10] Many VOP3 opcodes do not support op_sel
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AMDGPU
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          dpreobra
      </td>
    </tr>
</table>

<pre>
    The following GFX10 opcodes do not currently support op_sel but they should:

    v_ashrrev_i16
    v_lshlrev_b16
    v_lshrrev_b16
    v_max_i16
    v_max_u16
    v_min_i16
    v_min_u16
    v_mul_lo_u16
    v_add_nc_u16
    v_sub_nc_u16
    v_alignbit_b32
    v_alignbyte_b32
    v_interp_p2_f16

</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJxtkU1v3CAQhn-NfUFdYbDX6wOHRKvkFDWHNOrN4mPW0LJg8bHp_vtgK1FbbxCC4Zlh9MIrvLqyFw3o5K31b8ZN6PHhZ4ORn6VXEJHyyPmEZA4BXLJXFPM8-5BKwRjBIpETShoK1z5bVdG7Ch8r_LGiMi4jj7rcvoym2f-LbdR2weIGhy_wmf_ZNlhQ3iDjbqoK2lZlO1q_pVyp0cktjVl8Qbk1kxMmjYKSW35NsE0YlyDM40zG02enWjGqBjrwOplkgVXd_d3T8fH5R9UdS7z6UEL0xN0VvX5_pltT_reizsEyndIcFxPIQ5mTSTqLnfTncrD28rl9m4P_BTKVo4kxQyxB1_YDrTVriOwlJiCbQ4sPZMCyw73Y84achJBDV1suwMZFbUWI4PI3uMX2D-mEFMm1YQQTglvcN4RQOuzEAVo6DHDai76V0FcthjM3drfI2fkw1YGtykSeYklaE1P8m-Qxln-F9Y-W_jwn7QNTcwAvAq_XV7D1Ce-Lw94j">