<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=https://github.com/llvm/llvm-project/issues/54369>54369</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [X86] miscompile of overflow intrinsic + select in optnone functions
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          tetzank
      </td>
    </tr>
</table>

<pre>
    In functions marked with optnone, selecting a specific error value when an overflow happens leads to wrong assembler code.
One value in `select` needs to be 0, which leads to `xor reg, reg` clearing the overflow flag before the `cmov`.

The problem got introduced with LLVM 12, it seems.

https://godbolt.org/z/zG5rqM6zn
```
; optnone is important here
define i64 @adder(i64 %lhs, i64 %rhs) noinline optnone {
        %addresult = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %lhs, i64 %rhs)
        %errorbit = extractvalue {i64, i1} %addresult, 1
        ;%errorval = select i1 %errorbit, i64 148, i64 42 ; fine
        %errorval = select i1 %errorbit, i64 148, i64 0 ; wrong, 0 => xor
        ret i64 %errorval
}

declare {i64, i1} @llvm.sadd.with.overflow.i64(i64 %a, i64 %b)

; wrong code since llvm 12
; adder:
;   add     rdi, rsi  # sets OF
;   seto    al        # reads OF
;   xor     eax, eax  # clears OF
;   mov     ecx, 148
;   cmovo   rax, rcx  # reads OF
;   ret
;
; working code in llvm 11
; adder:
;   xor     eax, eax
;   add     rdi, rsi  # sets OF
;   seto    cl        # reads OF
;   mov     ecx, 148
;   cmovo   rax, rcx  # reads OF
;   ret

```
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJy1VU2P2zYQ_TXyZVBB314fdIjruAiQIJei6JWiRhazFOmS1Hqzv74zkmVrs2naoqggW6b45s3z08yose3X-oOBbjQyKGs8DMI9YgsXFXqw52CswSj7GTxqJIQ5gQB_Rqk6JQGdsw6ehB4RLj0aEAbsE7pO2wv04nxGItQoWg_BwsVZDvceh0ajA2lbjKPkECXvPhu80igDUZXM2egHGMQ5ukFIWMilV7K_kxLmmTQ4PPEmXyhI0rZjraHHu6BOixPRdNbhtEFIOdgnulxVzN-_0tbZWZI4wMkGUhScbUe5mPLx42-fIM04nQrkCw7-VXwfwtlH-bsoO9J5sm1jdYitI4HHF_78Uro_PlUv5hpUJddzXub7xXZQHtRwti4IE6BHhzOkxU7xblVAVCSibdFF2cO0zErd-0nZvHK82oGxymiOWZij7X6RvCMYcTj0ow4Q5QeQQmtGEMdElUbbA2fS-mmIPWFj9iFefI0n3I_yr1NNJdOoORM-BydkmJ_8m4wrXXw3vdPk-4WJQiemuWAoElY5FiFp8bD8LDJgh9nAN6r-LVcyUU1Vzbd4eYjy90D1eON2GBYvlhzXve1hXTQtSi3cd0z4h7aLlenNyvKlpObe444Dr4xEYFau4htirqN8FQN8D_hwrZq6yyugBDk5FDx8Pq6hdMsylDy8Hgx0U5u-RnK78oHimUnpMmOnpv0WTP05g-UEZvdXu9y-nNXNVE4-_3VaehK35coX6x7V4gzNntmW9Me2vP0H_9E0-bem_R8-vB4_m7bO212-E5uggsY6Kve_P1RReYBBeWmHs9I0P7r7OOW5qIyn10CU7W9NY24z5vZK2YxO199MRarksYmJlhbs-fXyEw3eLzz5s6PyfkSaHseyyKvdpq-TokuxK5pEdFW23TVts5UPbV6WSdWWUuQbLRrUnoWT6o2qsyTLkjwt0qQoijxuZdalTdltc1kWWVpRa-EglI6nBqP5vHH1pKEZT577Tvng75v03lInehst_GIMvXV1wPAizONmkltPWv8EMKAnAg">