<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=http://email.email.llvm.org/c/eJylU82OnDAMfhq4WCAmgfk5cNjuaKs9VK0q9QECMZBVSFASZrp9-jphut2uVnupFEhiO_7sz3Zn5XN7vzqHJuhnuE5o4IqARnQaIdtXhRcXLALOi6db1C3C-6SRykerQuvLXEQpJpNgYXHo0V0QwoTw-B2EBxWgtzN6GJyd6SgRRjToRFDWlPBoQICxbhY62i1KJwUM2l4j6OoRBNkQyEyYDpZJkIiwQgx5QTfQ44Rnl6Bm9Su990A-tiBKeLAO7r6cP3_7kURvfSlPyMYriQ5liqawS8buwScQGJSh4CizVYdoHGWruaHRi06FlFaYxEe5EseKqLX03IFw_aQC9mElv3C1qyY_LymgLLPqnFV32z_Gjz_FvGi8iffVbW1XVkOvhRlhsLbsoRjsgmZeXg5FEG7E4DN-FrMce1PQFr_JCyi-cnhVbCgyxm_rPbCr0rFSJghlPuoGZV6RtxFNlUoyiRfV4x_eyly2XJ74SeRiDZN17dO0duj2-ep0O4VADcgpxwdaowqkK4lkukTA21Yszj4Rm3RV3q8UAXto-JGzfGqbWg68HnbNQTDWHA5MDHzHm_7IRXVqdjzXokPt26z5lDG2EUaHrDnn_w-vWlYxWruafse6Lruu2_FTj7uTlGxfi6yucBZKl9FPad2Yuza57NbRk1IrH_xfJdGrRoOYoqUIgwoa2_s0OIoa4EoR_lPNbaBl4v42A3ag4RIymm9N7WOx3unoPCXTpkx-AwpraS0>53832</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            Compiling with -save-temps enabled for AMDGPU offloading results in unoptimized bitcode
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            openmp
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          jhuber6
      </td>
    </tr>
</table>

<pre>
    Currently when we enable `-save-temps` we pass `-disable-llvm-passes` to preserve the IR as it comes from code generation. In a normal compilation flow we use an assembler phase to then perform the optimizations on the IR. For AMDGPU the assembler phase is considered a no-op, so the final result is the unoptimized bitcode that comes from code generation while other architectures would be optimized.

For example
```
$ clang foo.c -fopenmp -fopenmp-targets=amdgcn-amd-amdhsa -O3 -save-temps -###
```
will contain `-disable-llvm-passes` in the final phase for the device bitcode.
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJx9UttunDAQ_Rp4GYEAsyQ88JDuKlUeqlaV-gEGD-DI2Mg2S9Ov79hs07SKIg3Ynts5c-mNeOnOm7WovXqBfUYNOwJq3iuEpCkyx6-YeVxWR69gW7lz0SKkC16ZUtclC1qMLt7AatGhvSL4GeHpO3AH0sNgFnQwWrPQVSBMqNFyL43O4UkDB23swlXwW6WKBhiV2QPo5hA4-RDIQpgW1pmTirB8oLyiHSk44pnVy0X-ivEOKMdBIodHY-Hhy-Xztx9R9X8u6QhZOynQoohsMrMm1RlcBIFRaiJHlW3KB-eg2_QNjSJ66WNZfuYf1Uo9ltRaQ-EWuB1m6XHwG-WF3WyK8ryWgCJPiktSPBz_wB9_8mVVeFM3xU2OZ1XDoLieYDQmHyAbzYp6WV8vmed2Qu8SduGLmAad0RG-2XHIvjJ4M2zIkord5D2wXaowKe251B9tg9Rvmnc0miYVdQKvcsA_fctT0THRspanXnqF3TmugaRydunnf7gd6ylipttEzUirwkVwP0bkAvQ780k3q7rZe9pnRi17JJko_9bnNDN6BP63I1uteabh0FM6t1FB1eOJ3bMqnbu2HZoTY_VdMQysrJpK3I1FjUPLiqYseZkq3qNyXXL6lFTV0X-6JKdLKruqqEjKmn73dZ33fV-ydsCyFaJqap7UBS5cqjyQyI2dUttFPv02OTIq6bz7a6Rey0kjRizKzzc_G9s9U01omzRS7yLv3wxJU7Y">