<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=http://email.email.llvm.org/c/eJy1VU2P2zYQ_TXyZSBBpuQPHXRw1vW2QNJDk_QaUBQlsZFEgaTs3X_fR3r9sdtF0SAosLCW1PC9N2-Go0rXz-VBG9qZgRw3rXSWIraVSZuQ0MbJp9isIlZE7IFmq8aWXCcp-oVF2zQqHhJuhstiT7UyUjh1lKRG6vhYx0LXsiZurRyq_plqLS2N2uElgjyS5YOkSmKtoOKkXBe2P3788xNAnGwNdzcEafAfNYh8fHhI6Asib5wn1fckRzsbD80d2VkIKWsvWo3WmRlxerTEEYDc_Dlo8ixmMvJM442IB6h-dcRnX82OvilHJz1eMi4c-KBGSOKUV88Oz1614yBHR3p8zQpXoTvw2kmPQZaVF_ziW0K_jaRNjRydhlPIQQViDuOx2UEcXsinqVdCeeWB64rxUh4-3mm4mpNE6T5Kd-df2AYHlK9ESLdG7mZQIwywkxSqUYJ7SGr1UZrxPxf9xnspaEJ0mA0OG5-IB6m1mH3ImcBX0u96RCivKXHdPFQ3TOs7yUc8_v71rgkG_j00EnkoD6SbO3Y4Ha0-dM5NNsp2ETvgz-oZZTqh9Ik2LTYqNc5O9XD4AE3-wf3P7o9P8f7KnnRu6COWvd6NVntQ_I_4_roV9xX7VZ_k8WxiJQVHP7xjCjQ97j7jJKlh6qW3woawPH7TmpfyXIry9rb5YXDDtZ2e-xqeO9GdL9Zdeb-gSemE1oR4PQDd3_fqOUCgdNyrGvUp5hXKq9FiXp-fCjhwVPIEA-kfxTq_sknfH4cXO_fLZbrapvSe9_8W_trHzxI2OMdFB5WgxfSBU4lN3JN7D7nFPJqrBJlh4eFfHvFk9F-oFpaN6n3FDpuCbdYs861wD3rh_zArePgyuUgYbS2G4zDhtPEe4ALEI_yJJa9U3ApBWFpMZBcIKB7ENEfZ_jqTKdZ0ZqIL4ZlpUZdZXWQFX_DZddqU8qhrNdtivZhNX_5wgsraOWS4yrLtetGVVZrzZbqVWZ2vNtmaNaJq1um6WsHzvK5Xi55Xsrcl_I0Ya7VG3spYRwEJW77t8Ki4-I5-gRa0_207qMh23A4TN9Y3PUNpFj-vXJUsZSxdsny5yQu2TZqcNXmz3DRNnqZCsChP5cBVf22khSkDZDW3Fi97Zd2tyxa4IbhQUoZEodBhKMsyjLLbTPRfvPvvxXlmZyyu8CkRb78zYQZeBzquUU7-6tpFSKUMefwN8dOTsA>53386</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            .arm directive doesn’t align 32-bit code instructions and sections by 4 bytes
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            good first issue,
            backend:ARM,
            llvm:asmparser
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          evodius96
      </td>
    </tr>
</table>

<pre>
    For Arm targets (e.g. cortex-r5), using the “.arm” directive in hand-coded assembly does not have the same behavior with the LLVM integrated assembler as for GCC. The directive will ensure that succeeding instructions are correctly interpreted as Arm-mode instructions, but _it won’t enforce a 4byte alignment on instructions (or corresponding sections)_. In order to do this, a user has to explicitly align sections using an alignment directive.

There is no Arm-determined specification governing the “.arm” directive alignment behavior.  Further, the documentation for the .arm and .thumb directives in the GNU assembler makes no mention of alignment ([https://sourceware.org/binutils/docs/as/ARM-Directives.html#ARM-Directives](https://sourceware.org/binutils/docs/as/ARM-Directives.html#ARM-Directives))

However, because the GNU assembler (GAS) implements the 4-byte alignment behavior, the LLVM integrated Arm assembler should match that behavior.  This was recommended by Arm in a (now-abandoned) code review: [https://reviews.llvm.org/D110580 ](https://reviews.llvm.org/D110580 )

See attached [sample.s.txt](https://github.com/llvm/llvm-project/files/7927623/sample.s.txt)
Build for GCC cross-compiler: arm-none-eabi-gcc -nostartfiles -mcpu=cortex-r5 -o sample sample.s

</pre>
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