<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=http://email.email.llvm.org/c/eJytVk2P2zYQ_TXyZRBDpNaWffBhnU2BAMmlCHrIxaBEymIgka5I7Ud_fR8pydY6zjZtY8gSP4Yzb2YehyysfNnV3p9ckt0n_Dc8RysL2_il7Y7o_YV_tVmvN18y9jlJH5L0fnyv0_GJXdF7S145nyZ8k_DtKJTvhwbh57zwuqTDvbctvlVjhSeTZDORTvm-M3Q4lIwdRJQ7VMqX9UFIGRWvTcLfEwuvVTAzrU7yhzm6Mxz2C-DA5D48P7B1FYkYBHpHdFRGdQJdwtzgTNc-URVcWackjKTSdp0qPWnjVUPCOdUWzQsBs69VpzDfN5IKRYJco481JNtTZx9Vq4ynIHL2LToLsxerwtCnT398po-_Q49U5NSfvTKlot5pc6QBEabak4Ap9VzWwhxVAFu2J_SOAaU2zishyVbjslu-LOlLrd2VlVoAAhX9ETrI1wiu9mQN3BvC6jCo6FE0vQraQ6fSnfOEREiqOtvGMTFLz5I-QvAJma07gIJF0TQB0TzTIbQ-LnWiVeR1eNXqZQzmUc0mB-sDHiVD3EMa-YoHLYVq7FPQCK4hooh2cAN0iKkzkN4TC66rc9Dl9-G8pGBMZaWfIVdMYRhjCqOMxe97xAxEtE9D0G5yRz1r510IqKsnvb2D2jFdyzk_dRWUxADGjCJsEZok7BGMgHzRXetrqnpTem2RnMml1wAG-3Ptk3-2-j4RN_cHUfCVkuxhyPSYYJ3x4Hv83FOhfSnABagagGMsuUsPX7-uoonHD8wE-IM4rAXeHUrngw6BrWLoLjQTzmRxDJ9BPRq-ECIOZDM8POKZrELrABIWRvNXqsaVRUeNAE-CdHZbaHhnKK8wsadTp8DbYOyyZDWPzF2cPNV6rEjJah8BTqIYeIjtYZyxcSI7T9zAiflV1BsINCmGrVhLl2n8oZTs0_QNDetXMbooOefhhyvz2ytX_7xyE1eO9eg_k2MkVnRi1s4n0vwMeS6YthGTevadKP1QQXCwnAkMaucxu5vQfSugLP03mthbmtgt_m5_hr_BSoASRM5cZvxV901qQ_Y2t0cbKHOXlF_nen2zRAzvsbSNh_CsRqI4eroU6oXcZXKbbcUCp35tu903JbTWi75rrq822td9sUSNRqdpHqfPO5yp33AOo6ud65VDY5Wl-XZR74oi32zytdqWMtuygslMMC7YBlVkVWaML2KU3A77MeHcqCeKKtDGflz8fwR6x1POU5bmPMMvXcpSpXdlJbe8rHJe5WC-aoVulkFPuLUtul1UiaPXYbIJR8VlEpcMEFypCBgIvfZN7JQNDgWMII1W9iUuENpM95OpyFe2m-r1yQaimbKLdxGHk33IsltEB3YR_d98Z_wN>53079</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [clang] produces incorrect LLVM IR for atomic post increments on floats
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            new issue
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          jeaiii
      </td>
    </tr>
</table>

<pre>
    https://godbolt.org/z/f8668T31M

```
auto test0()
{
    static _Atomic float n;
    return __c11_atomic_fetch_add(&n, 1, 5);
}

auto test1()
{
    static _Atomic float n;
    return n++;
}

```
test0 -  generates `atomicrmw fadd` and correct intel assembly (there could be a slight improvement here)
test1 - generates an LLVM IR code sequence using atomic compare exchange `cmpxchg` instead of using `atomicrmw fadd`. This code sequence has a bug in that it only returns the value of the first load from the atomic float. If two threads call `test1()` at the same time they could get the same value returned (`%2` below), rather than n and n + 1. The generated compare exchange LLVM IR could be fixed by returning `%11`, but now that `atomicrmw fadd` exists it should be used instead.

if `float` is changed to `int` both functions generate `atomicrmw add`

LLVM IR of `test1()`
```
  %1 = load atomic i32, i32* bitcast (float* @_ZZ5test1vE1n to i32*) seq_cst, align 4, !dbg !32, !tbaa !33
  %2 = bitcast i32 %1 to float, !dbg !32
  br label %3, !dbg !32

3: ; preds = %3, %0
  %4 = phi float [ %2, %0 ], [ %11, %3 ], !dbg !32
  %5 = fadd float %4, 1.000000e+00, !dbg !32
  %6 = bitcast float %4 to i32, !dbg !32
  %7 = bitcast float %5 to i32, !dbg !32
  %8 = cmpxchg i32* bitcast (float* @_ZZ5test1vE1n to i32*), i32 %6, i32 %7 seq_cst seq_cst, align 4, !dbg !32
  %9 = extractvalue { i32, i1 } %8, 0, !dbg !32
  %10 = extractvalue { i32, i1 } %8, 1, !dbg !32
  %11 = bitcast i32 %9 to float, !dbg !32
  br i1 %10, label %12, label %3, !dbg !32

12: ; preds = %3
  ret float %2, !dbg !36
```

should return `%11` not `%2`
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJytVsmO2zgQ_Rr5Uoihxbbsgw_t9AQIkFwGwRxyMSixJDGQREek2t3z9fNISbbacTqZwRgyxaX46tXCojItX_aVtScTJA9B_AFPqWWma7vUXYnR3_gX281m-yWJPgfhYxA-jO0mHB8_FL3VZNnYMIi3QbwbhdLD0CH8jBVW5XR8sLrBu6i1sNQGyUykY9t3LR2PeRQdhZc7Fmzz6iik9MCbNojfU-SatVMz7Q7Sxzm7C53of6ADlQf3_ETXjSe8E-gdUcktdwJDwtpgTNecqXCmbEISraRcdx3nllRruSZhDDdZ_ULgbCvuGOt9LSljEmRqVVaQbE6dfuKGW0tO5GKbNxZqr1pFS58-_fWZPv4JHMlk-HvPbc7UG9WWNDDCUnMSUMXPeSXakh3ZvDlhVDqWqjWWhSRdjNvu2bKkL5UyN1oqAQqU9SUwyFZwrrKkW5g3uNVgkulJ1D07dDcoVGcsIRCSik43fk7MwrOkjxA8I7JVB1LQKOraMZpH2rnW-q1GNExWuabil9GZJc8WB-0DH5bO7y6M8Tp2KBnX-uwQkWvwKLztzEA6-NC1kD5Q5Ezni9Plj-68hmAMZaGeIZdNbhh9CqVR5N_v4TMkoj4PTrubO_ysjDXOoaaacHsD2DFcy3l-qsKBeAf6iMJtnpoknBHMIPm8udpWVPRtbpVGcCaTXhMY9M_RJ_t08WMg7p4PImcrBcnjEOkxwCqJne3-9UCZsrlALgBqII65YBUev35dexVPf0Stoz-IQ5vLu2NurMMQOCotrVw3iCOZle41wKNjMyH8RDLjE3s-k1agDiShYVR_AzXuzDqqBfLESSf3hYY2QXmFigOdOkbeOmXXLeu5Z1Z-8VSpsSIF64MnOIli4tH3h_koGheSy8Idnlhfe1yXQBMwdPlaugz9D6XkEIZvIGxe-egKconDT3em93euf71z63eO9eg_J8eYWN6IWT-dkuZ3kufKaec58bPtRG6HCoKL5ZLASO3UR3frhm85NAr_DVL0FlJ0L393v5O_Touj4kQuuRzFr4ZvpjZk7-f2qANl7hry21hv7paIoR1L23gJz2okiqOla6FeyH0id8lOLKyyNe9xMvIaBQ7nAZS07HNchqqd7tqpYBW6m2rPSTuntXnn71WDW2pgbBZ9V99-Hilb9dkSdR6Dun6aXu-g6hvwMVTG9GzQWSdhultU-81mF27TrNit5IoTGW6zRLKMRbzdhTlvVwvvaeOYB3Hc8pk8BPqwYaH2cRjHYRSmcYJfuJQ5h6u8kLs4L9K4SJH73AhVLx0P99226PaeEi5fg8XaXRbXRXxmIMXZO8rh41up0t3-Gwul1MJr3nvm_wArd-aD">