<table border="1" cellspacing="0" cellpadding="8">
    <tr>
        <th>Issue</th>
        <td>
            <a href=http://email.email.llvm.org/c/eJylVFFvmzAQ_jXwckpETCDkgYd0rFKlVp2qatoeDTbg1uDMNmmyX7-zIV2atOqkRcRg-_N3d9_duVTskF8rDbYVBviedlvJ4eYhiDdBVATRJkij6fFTS3XDLVgtHC6ICwgIoVRXbbqc9arnMyn6YT9r-gE3Jgo_Ml6LngNTQ-lOLqNaqYBkxzlJWBSQL9N-QDZuabu4XCIBWUOwuhpZwZ9ceE-kogyoVZ2oXs9cEMLQK8245sxtUimaHrJTLvLPXORTrthz1d0g4SROH5Q3dYpdjljKGJxr4qmOWI3ynwCWk8ar4t184YeUFY6w1YoNFTeYaQ61klK9iL4BagzvSnm4TLjLT4wGP_8F5BqfY04nP8efZNq_95kPJLnaR0FSfIBZHzGLC0zdqZ17j-Ltsw92id9dn--i_q9np5GcYZzuDjMWYTQh32BQ-Xc1bq3dGqefl6FRrFTSzpVucPYb_490f_dz_XRM4el4Y7HS1LMBKZ65z8xYeKXacfANuaU94wxEbxWUwlbUWNT7yi3whusRzwbtcrnx9frVn_mGiUVghpzaU1F4vC_uYZyjgcECxuxLAFr0AdBApXomrFA9lfKAVQZmqNrRCYOr2Hm-0HsGm41veUfcCWMcjWWwpdZy3RvH1VGLZ11IYzS4hIrdFg_FIFw94p1jRCck1Y6zUt2WYiM5WKteQNiArAy0aEv68OFHlkJJq2eO1jGut6JrvhP8xcyl3HWT8kUaxeslujwPWR6zdbymIR1sq3TOaI92OxkOWuZn2RO2Hco5uoMTxza9Ztg-T7xCr64x3IEb_EjImqzCNi9JlKYp8sdJnbAyyVbLkmRpWmUxKes4DSUtuTQ5VjbeiVMMaHHS0N2TvsnJrwHvEHuYqXom3D3c8d5S64U_QrxL8aZSDLPv15Mi_P8gRE4isliQOFrEyyxezLMVjSIWV3WaxQzFw97mHRXyVeFQ556yHBqDm1IY-1f-EIsPL0POfczooRVW-skx5qSA29vvd4BBcE0tXktvCtpVuG_qGstkuoZr3LGu0LYKsR5nQh9H7oP4A8DZALQ>52927</a>
        </td>
    </tr>

    <tr>
        <th>Summary</th>
        <td>
            [AArch64] LLVM generates integer load + fmov for atomic floating point loads
        </td>
    </tr>

    <tr>
      <th>Labels</th>
      <td>
            backend:AArch64,
            quality-of-implementation,
            llvm:codegen
      </td>
    </tr>

    <tr>
      <th>Assignees</th>
      <td>
      </td>
    </tr>

    <tr>
      <th>Reporter</th>
      <td>
          danilaml
      </td>
    </tr>
</table>

<pre>
    For this example IR:
```
target triple = "aarch64-none-linux-gnu"

define double @foo(double %d0, double* %p1, double* %p2) {
  %d1 = load atomic double, double* %p1 unordered, align 8
  %d2 = load atomic double, double* %p2 unordered, align 8
  %d3 = fmul double %d1, %d2
  %d4 = fadd double %d0, %d3
  ret double %d4
}
```
`llc` produces the following assembly:
```foo:                                    // @foo
        ldr     x8, [x0]
        ldr     x9, [x1]
        fmov    d1, x8
        fmov    d2, x9
        fmul    d1, d1, d2
        fadd    d0, d0, d1
        ret
```
https://godbolt.org/z/TaxMY9jd3


It looks like the load above is expanded into bitcast + integer load during AtomicExpandPass (there is a TODO there about adding a hook to conditionally do such expansion), and AArch64 is missing td patterns to match the above to `LDRDui` or similar, compared to how it's handled in X86 backend (https://reviews.llvm.org/D60394).
</pre>
<img width="1px" height="1px" alt="" src="http://email.email.llvm.org/o/eJyNVNGOmzoQ_Rp4GSUCQxJ44CF7uStV2qpVVVXto7ENuGvs1Da72X59x4bsze626o2IwZ7j8ZwzM-4Mf2pujQU_SgfiTKeTEvDuU1Ick6xNsmOyz9YnTj21g_DgrQy4pGghIYRSy8Z9udFGi42Sej5vBj2jYXURRy56qQVwM3dhZ5n1xiSkuszJjmcJ-We1J-QYlk752yWSkBqSw83iFeLOPEaiDOVAvZkke97zxiHM2lgurODBSJUcNFTXvsj_9kX-6quIvvppVnDFM5KKR11jywVLOYfXmkRXF6xF-a8A5arxof1tvvBDKYYjnKzhMxMOMy2gN0qZR6kHoM6JqVNPbxMe8lPggX__JeQWn0tO1ziXn-I2vs9VJLK7OWfJrv0Dpr5g8jeYfjIP4b2Id67-YCXRWr-2ov7Pe9eRvMIE3QNmKcJsRb7AoPK_1Xj0_uSCflGGwfDOKL81dsDZT_x_puf33-rvlxRej-88Vpq5d6DkvYiZWQqvMw8CYkOeqOaCg9TeQCc9o86j3jdhQQzCLng-25DLY6zXf-Oej5hYBFbo00ZXFD5_aD_AMscDZg_IOZYAjBgD4AHMaC69NJoq9YRVBm5m4xKEw1XsvFjomsPxGFs-OJ6kc8GN53Ci3gurXfA1UY97A6WFDS6hYnftp3aWoR7xznFykora4JOZ6USxkQJsNI8gfUIODkY8S0X68LXaQ0fZvcDTkddL0a14kOLRbZV6mFbl231W1CWGvE15U_C6qGnqpVeiwQpbw8cyg7u7L-9hEFpY6rE7XugahI611WO0623Qo8UHvieD2Ihz6WxV86oMpB_nbou8cBLCWl8b7MPvgiG9W9RtFg4_dqQmh3RsasYOvMxynpWi3ItckF1eHTjLM1b2LNulinZCuUAAL9dVDDzxwoaQ5bYgP2a8jPzTxvQbGS70SWhPfczgBRJDKo7McKQb13dtKhuSkTwnRZYXZVXk2-pAs4wXrN9XBUcNscXFRKV6Fjq1TWTVzYNDo5LO_5eFFGsQ70QRJQ_-6exHYxtONeZ9UmlUoIn0fwEjeeul">