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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Improve codegen for logical shifts and rotates of 128-bit values"
href="https://bugs.llvm.org/show_bug.cgi?id=52370">52370</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Improve codegen for logical shifts and rotates of 128-bit values
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>david.bolvansky@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, pengfei.wang@intel.com, spatel+llvm@rotateright.com
</td>
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<p>
<div>
<pre>Codegen for logical shifts and rotates of 128-bit values is much worse than
codegen from GCC..
typedef unsigned __int128 v1ti __attribute__ ((__vector_size__ (16)));
typedef unsigned __int128 ti;
v1ti ashl_1(v1ti x) { return x << 1; }
v1ti ashl_2(v1ti x) { return x << 2; }
v1ti ashl_7(v1ti x) { return x << 7; }
v1ti ashl_8(v1ti x) { return x << 8; }
LLVM -O2 -msse2:
ashl_1(unsigned __int128 __vector(1)): # @ashl_1(unsigned __int128 __vector(1))
movq %xmm0, %rax
pshufd $238, %xmm0, %xmm0 # xmm0 = xmm0[2,3,2,3]
movq %xmm0, %rcx
shldq $1, %rax, %rcx
addq %rax, %rax
movq %rcx, %xmm1
movq %rax, %xmm0
punpcklqdq %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0]
retq
ashl_2(unsigned __int128 __vector(1)): # @ashl_2(unsigned __int128 __vector(1))
movq %xmm0, %rax
pshufd $238, %xmm0, %xmm0 # xmm0 = xmm0[2,3,2,3]
movq %xmm0, %rcx
shldq $2, %rax, %rcx
shlq $2, %rax
movq %rcx, %xmm1
movq %rax, %xmm0
punpcklqdq %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0]
retq
ashl_7(unsigned __int128 __vector(1)): # @ashl_7(unsigned __int128 __vector(1))
movq %xmm0, %rax
pshufd $238, %xmm0, %xmm0 # xmm0 = xmm0[2,3,2,3]
movq %xmm0, %rcx
shldq $7, %rax, %rcx
shlq $7, %rax
movq %rcx, %xmm1
movq %rax, %xmm0
punpcklqdq %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0]
retq
ashl_8(unsigned __int128 __vector(1)): # @ashl_8(unsigned __int128 __vector(1))
movq %xmm0, %rax
pshufd $238, %xmm0, %xmm0 # xmm0 = xmm0[2,3,2,3]
movq %xmm0, %rcx
shldq $8, %rax, %rcx
shlq $8, %rax
movq %rcx, %xmm1
movq %rax, %xmm0
punpcklqdq %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0]
retq
GCC -O2 -msse2:
ashl_1(unsigned __int128 __vector(1)):
movdqa %xmm0, %xmm1
psllq $1, %xmm0
pslldq $8, %xmm1
psrlq $63, %xmm1
por %xmm1, %xmm0
ret
ashl_2(unsigned __int128 __vector(1)):
movdqa %xmm0, %xmm1
psllq $2, %xmm0
pslldq $8, %xmm1
psrlq $62, %xmm1
por %xmm1, %xmm0
ret
ashl_7(unsigned __int128 __vector(1)):
movdqa %xmm0, %xmm1
psllq $7, %xmm0
pslldq $8, %xmm1
psrlq $57, %xmm1
por %xmm1, %xmm0
ret
ashl_8(unsigned __int128 __vector(1)):
pslldq $1, %xmm0
ret
With AVX2:
LLVM:
ashl_127(unsigned __int128 __vector(1)): # @ashl_127(unsigned __int128
__vector(1))
vmovq %xmm0, %rax
shlq $63, %rax
vmovq %rax, %xmm0
vpslldq $8, %xmm0, %xmm0 # xmm0 =
zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
retq
GCC:
ashl_127(unsigned __int128 __vector(1)):
vpslldq $8, %xmm0, %xmm0
vpsllq $63, %xmm0, %xmm0
ret
<a href="https://godbolt.org/z/v6E7E6jqe">https://godbolt.org/z/v6E7E6jqe</a>
v1ti ashr_127(v1ti x) { return x >> 127; }
LLVM -O3 -msse2:
ashr_127(unsigned __int128 __vector(1)): # @ashr_127(unsigned __int128
__vector(1))
pshufd $238, %xmm0, %xmm0 # xmm0 = xmm0[2,3,2,3]
movq %xmm0, %rax
shrq $63, %rax
movd %eax, %xmm0
retq
GCC -O3 -msse2:
ashr_127(unsigned __int128 __vector(1)):
psrldq $8, %xmm0
psrlq $63, %xmm0
ret
<a href="https://godbolt.org/z/cb75fKExP">https://godbolt.org/z/cb75fKExP</a></pre>
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