<html>
    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [AArch64] improve codegen for -abs(x)"
   href="https://bugs.llvm.org/show_bug.cgi?id=52216">52216</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[AArch64] improve codegen for -abs(x)
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AArch64
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>spatel+llvm@rotateright.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>arnaud.degrandmaison@arm.com, llvm-bugs@lists.llvm.org, smithp352@googlemail.com, Ties.Stuij@arm.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Splitting off from what was originally in <a class="bz_bug_link 
          bz_status_RESOLVED  bz_closed"
   title="RESOLVED FIXED - [X86] Failure to flip cmov cc for -abs(x)"
   href="show_bug.cgi?id=50991">bug 50991</a> (but that was fixed for x86
only):

define i32 @nabs32(i32 %0) {
  %2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
  %3 = sub nsw i32 0, %2
  ret i32 %3
}

define i64 @nabs64(i64 %0) {
  %2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true) #3
  %3 = sub nsw i64 0, %2
  ret i64 %3
}

declare i32 @llvm.abs.i32(i32, i1 immarg)
declare i64 @llvm.abs.i64(i64, i1 immarg)

----------------------------------------------------------------------------

% llc -o - nabs.ll -mtriple=aarch64
nabs32:                                 // @nabs32
        cmp     w0, #0
        cneg    w8, w0, mi
        neg     w0, w8
        ret

nabs64:                                 // @nabs64
        cmp     x0, #0
        cneg    x8, x0, mi
        neg     x0, x8
        ret

----------------------------------------------------------------------------

gcc does better on these:
<a href="https://godbolt.org/z/GbYha3Kso">https://godbolt.org/z/GbYha3Kso</a>
...but note that i8 and possibly i16 are better as-is with clang.</pre>
        </div>
      </p>


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