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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AMDGPU][GFX10] MIMG opcodes with bias and a16 have incorrect address size"
href="https://bugs.llvm.org/show_bug.cgi?id=51720">51720</a>
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<th>Summary</th>
<td>[AMDGPU][GFX10] MIMG opcodes with bias and a16 have incorrect address size
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>d-pre@mail.ru
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</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>According with AMD documentation, bias size is affected by a16. However AMDGPU
assembler does not correct bias size which results in test failures for
GATHER_B* and SAMPLER_B* opcodes.
For example, the following instruction may be assembled using sp3 but not llvm
AMDGPU assembler:
image_gather4_b v[5:8], v[1:2], s[8:15], s[12:15] dmask:0x8
dim:SQ_RSRC_IMG_CUBE a16
AMDGPU assembler expects 96-bit address size:
first dword: bias
second dword: t, s
third dword: 0, face
Actual address in this case should be as follows:
first dword: s, bias
second dword: face, t
Current implementation computes address size as shown here (see
<a href="https://github.com/llvm/llvm-project/blob/e5438f386854136d848989315f53788808afa37a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp#L158">https://github.com/llvm/llvm-project/blob/e5438f386854136d848989315f53788808afa37a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp#L158</a>):
unsigned AddrWords = BaseOpcode->NumExtraArgs;
unsigned AddrComponents = ...
if (IsA16)
AddrWords += divideCeil(AddrComponents, 2);
else
AddrWords += AddrComponents;
In other words, NumExtraArgs accounts for offset, bias and z-compare (but not
derivatives which are handled elsewhere). So currently bias size is not
affected by a16.
Note that bias size may affect address size under the following conditions:
- a16=1.
- opcode has no z-compare (it follows bias and always 32-bit aligned).
- opcode has no derivatives (it follows z-comp and also 32-bit aligned).
It looks like NumExtraArgs should be split into 3 separate fields (offset,
bias, zcomp) to account for bias size variations.</pre>
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