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<base href="https://bugs.llvm.org/">
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Failure to make use of dereference range to improve vectorization"
href="https://bugs.llvm.org/show_bug.cgi?id=51075">51075</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Failure to make use of dereference range to improve vectorization
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Windows NT
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Scalar Optimizations
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>a.bataev@hotmail.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
</td>
</tr></table>
<p>
<div>
<pre><a href="https://simd.godbolt.org/z/PTsGGYzeW">https://simd.godbolt.org/z/PTsGGYzeW</a>
As mentioned on [<a class="bz_bug_link
bz_status_NEW "
title="NEW - Poor handling of float3 within a float4 type"
href="show_bug.cgi?id=50920">Bug #50920</a>] we often have cases where float3 types are
embedded with a float[4]/float4 payload. Typically to assist is some custom
downcoding for particularly hot code, but where scalar code is used otherwise.
struct Vector3 {
float m_floats[4];
};
Vectorization of this float dotproduct3 scalar code results in a mixture of
float2 and float types:
float Dot3(struct Vector3 &a, struct Vector3 &b) {
float dot = 0;
dot += a.m_floats[0] * b.m_floats[0];
dot += a.m_floats[1] * b.m_floats[1];
dot += a.m_floats[2] * b.m_floats[2];
return dot;
}
define float @Dot3(%struct.Vector3* nocapture nonnull readonly align 4
dereferenceable(16) %0, %struct.Vector3* nocapture nonnull readonly align 4
dereferenceable(16) %1) {
%3 = getelementptr inbounds %struct.Vector3, %struct.Vector3* %0, i64 0, i32
0, i64 0
%4 = load float, float* %3, align 4, !tbaa !3
%5 = getelementptr inbounds %struct.Vector3, %struct.Vector3* %1, i64 0, i32
0, i64 0
%6 = load float, float* %5, align 4, !tbaa !3
%7 = fmul float %4, %6
%8 = fadd float %7, 0.000000e+00
%9 = getelementptr inbounds %struct.Vector3, %struct.Vector3* %0, i64 0, i32
0, i64 1
%10 = getelementptr inbounds %struct.Vector3, %struct.Vector3* %1, i64 0, i32
0, i64 1
%11 = bitcast float* %9 to <2 x float>*
%12 = load <2 x float>, <2 x float>* %11, align 4, !tbaa !3
%13 = bitcast float* %10 to <2 x float>*
%14 = load <2 x float>, <2 x float>* %13, align 4, !tbaa !3
%15 = fmul <2 x float> %12, %14
%16 = extractelement <2 x float> %15, i32 0
%17 = fadd float %8, %16
%18 = extractelement <2 x float> %15, i32 1
%19 = fadd float %17, %18
ret float %19
}
But we should make use of the fact that the sources are both dereferencable as
float4, and then either extract the float2/float inside or maybe treat this as
a <float x 3>:
float Dot3v(struct Vector3 &a, struct Vector3 &b) {
__m128 aa = _mm_loadu_ps(a.m_floats);
__m128 bb = _mm_loadu_ps(b.m_floats);
__m128 rr = _mm_mul_ps(aa, bb);
__m128 dot = rr;
dot = _mm_add_ss(dot, _mm_shuffle_ps(rr, rr, _MM_SHUFFLE(1,1,1,1)));
dot = _mm_add_ss(dot, _mm_shuffle_ps(rr, rr, _MM_SHUFFLE(2,2,2,2)));
return _mm_cvtss_f32(dot);
}
define float @Dot3v(%struct.Vector3* nocapture nonnull readonly align 4
dereferenceable(16) %0, %struct.Vector3* nocapture nonnull readonly align 4
dereferenceable(16) %1) {
%3 = bitcast %struct.Vector3* %0 to <4 x float>*
%4 = load <4 x float>, <4 x float>* %3, align 4, !tbaa !3
%5 = bitcast %struct.Vector3* %1 to <4 x float>*
%6 = load <4 x float>, <4 x float>* %5, align 4, !tbaa !3
%7 = fmul <4 x float> %4, %6
%8 = shufflevector <4 x float> %7, <4 x float> poison, <4 x i32> <i32 1, i32
undef, i32 undef, i32 undef>
%9 = fadd <4 x float> %7, %8
%10 = shufflevector <4 x float> %7, <4 x float> poison, <4 x i32> <i32 2, i32
undef, i32 undef, i32 undef>
%11 = fadd <4 x float> %10, %9
%12 = extractelement <4 x float> %11, i64 0
ret float %12
}</pre>
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