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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - some ARM routines do not align sp to 8-byte boundaries"
href="https://bugs.llvm.org/show_bug.cgi?id=50986">50986</a>
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<th>Summary</th>
<td>some ARM routines do not align sp to 8-byte boundaries
</td>
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<th>Product</th>
<td>compiler-rt
</td>
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<th>Version</th>
<td>unspecified
</td>
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<th>Hardware</th>
<td>Other
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>compiler-rt
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>rin@NetBSD.org
</td>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<p>
<div>
<pre>Created <span class=""><a href="attachment.cgi?id=25001" name="attach_25001" title="Fix stack alignment for ARM">attachment 25001</a> <a href="attachment.cgi?id=25001&action=edit" title="Fix stack alignment for ARM">[details]</a></span>
Fix stack alignment for ARM
For ARM EABI, stack pointer is required to be aligned to 8-byte boundaries.
However, unfortunately, some assembler routines in compiler-rt do not align sp
properly.
This is problematic especially for ARMv5TE; GCC emits {ld,st}rd for [sp, 8*x],
assuming that sp is properly aligned. If not, these instructions cause
alignment faults (operands for {ld,st}rd should be aligned to 8-byte boundaries
for pre-ARMv6 processors).
Please find the attached patch for fix against today's source at GitHub (by
Nick Hudson (skrll at NetBSD dot org) and myself):
(1) For aeabi_cfcmp.S, save ip additionally to ensure number of pushed
registers is even.
(2) For divmodsi4.S, divsi3.S, and modsi3.S, stop saving r7, which is not used
at the moment.
Thanks,
rin</pre>
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