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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86][SSE] Scalarize vector load to avoid extractions for scalar conversions"
href="https://bugs.llvm.org/show_bug.cgi?id=50966">50966</a>
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<th>Summary</th>
<td>[X86][SSE] Scalarize vector load to avoid extractions for scalar conversions
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Windows NT
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: X86
</td>
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<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, pengfei.wang@intel.com, spatel+llvm@rotateright.com
</td>
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<p>
<div>
<pre><a href="https://c.godbolt.org/z/M73qqrcYe">https://c.godbolt.org/z/M73qqrcYe</a>
define <4 x float> @sitofp_v4i64_v4f32(<4 x i64>* %0) {
%2 = load <4 x i64>, <4 x i64>* %0, align 32
%3 = sitofp <4 x i64> %2 to <4 x float>
ret <4 x float> %3
}
llc -mcpu=skx
sitofp_v4i64_v4f32: ;; good
vcvtqq2psy (%rdi), %xmm0
retq
llc -mcpu=btver2
sitofp_v4i64_v4f32: ;; bad
vmovdqa (%rdi), %xmm0
vmovdqa 16(%rdi), %xmm1
vpextrq $1, %xmm0, %rax
vmovq %xmm0, %rcx
vcvtsi2ss %rax, %xmm2, %xmm2
vcvtsi2ss %rcx, %xmm3, %xmm0
vmovq %xmm1, %rax
vinsertps $16, %xmm2, %xmm0, %xmm0 # xmm0 = xmm0[0],xmm2[0],xmm0[2,3]
vcvtsi2ss %rax, %xmm3, %xmm2
vpextrq $1, %xmm1, %rax
vinsertps $32, %xmm2, %xmm0, %xmm0 # xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
vcvtsi2ss %rax, %xmm3, %xmm1
vinsertps $48, %xmm1, %xmm0, %xmm0 # xmm0 = xmm0[0,1,2],xmm1[0]
retq
We could avoid a lot of xmm->gpr traffic if the vector load was scalarized by
the extracts, which would then allow the vcvtsi2ss to fold loads.</pre>
</div>
</p>
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