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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [InstCombine] remove unnecessary truncate"
href="https://bugs.llvm.org/show_bug.cgi?id=50575">50575</a>
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<th>Summary</th>
<td>[InstCombine] remove unnecessary truncate
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Scalar Optimizations
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>spatel+llvm@rotateright.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<p>
<div>
<pre>Forking this off from <a class="bz_bug_link
bz_status_NEW "
title="NEW - [InstCombine] Failure to fold sext(trunc(ashr(x,bw-1)) -> sext(ashr(x,bw-1)"
href="show_bug.cgi?id=49543">bug 49543</a> - we can eliminate an intermediate cast in a
sequence like this by using 'ashr' to replicate the signbit:
define i64 @src(i32 %a0) {
%a = lshr i32 %a0, 24
%b = trunc i32 %a to i8
%c = sext i8 %b to i64
ret i64 %c
}
define i64 @tgt(i32 %a0) {
%a = ashr i32 %a0, 24
%c = sext i32 %a to i64
ret i64 %c
}</pre>
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