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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [MCA] In-order pipeline doesn't track memory load/store dependencies."
href="https://bugs.llvm.org/show_bug.cgi?id=50483">50483</a>
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<th>Summary</th>
<td>[MCA] In-order pipeline doesn't track memory load/store dependencies.
</td>
</tr>
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<th>Product</th>
<td>tools
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Windows NT
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>llvm-mca
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>andrea.dibiagio@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>andrea.dibiagio@gmail.com, llvm-bugs@lists.llvm.org, matthew.davis@sony.com
</td>
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<p>
<div>
<pre>The in-order pipeline is not tracking loads and stores, and therefore, it is
completely ignoring load/store dependencies.
Example:
<span class="quote">> cat foo.s</span >
```
str x1, [x4]
ldr x2, [x4]
```
<span class="quote">> llvm-mca -mtriple=aarch64 -mcpu=cortex-a55 --timeline --iterations=5 --noalias=false</span >
```
Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)
[1] [2] [3] [4] [5] [6] Instructions:
1 4 1.00 * str x1, [x4]
1 3 1.00 * ldr x2, [x4]
Timeline view:
Index 012345678
[0,0] DeeeE. . str x1, [x4]
[0,1] .DeeE. . ldr x2, [x4]
[1,0] .DeeeE . str x1, [x4]
[1,1] . DeeE . ldr x2, [x4]
[2,0] . DeeeE . str x1, [x4]
[2,1] . DeeE . ldr x2, [x4]
[3,0] . DeeeE. str x1, [x4]
[3,1] . DeeE. ldr x2, [x4]
[4,0] . DeeeE str x1, [x4]
[4,1] . DeeE ldr x2, [x4]
```
When flag --noalias=false is specified, younger loads are not allowed to pass
older stores. Flag --noalias=false literally means "assume that younger loads
may-alias older stores".
However, the timeline clearly shows how loads are not waiting for the store
completion.
==
For reference: this is what happens if the same code is simulated on a
cortex-a57 (which, however, is an out-of-order processor).
```
Timeline view:
0123456789
Index 0123456789 01234567
[0,0] DeER . . . . . . str x1, [x4]
[0,1] D=eeeeER . . . . . ldr x2, [x4]
[1,0] D=====eER . . . . . str x1, [x4]
[1,1] .D=====eeeeER . . . . ldr x2, [x4]
[2,0] .D=========eER . . . . str x1, [x4]
[2,1] .D==========eeeeER . . . ldr x2, [x4]
[3,0] . D=============eER . . . str x1, [x4]
[3,1] . D==============eeeeER . . ldr x2, [x4]
[4,0] . D==================eER . . str x1, [x4]
[4,1] . D==================eeeeER ldr x2, [x4]
```
The out-of-order simulation pipeline uses an LSU to simulate load/store
accesses and track memory dependencies between operations.
When flag -noalias=false is specified, loads are correctly delayed until older
stores have fully executed.
Note that by default, flag -noalias is always set to true, so, by default,
loads don't need to wait for older stores because the assumption is that they
won't alias.</pre>
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