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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - llvm-mca for cortex-a57 gets thrown off by SIMD loads with dependencies (negative latency?)"
href="https://bugs.llvm.org/show_bug.cgi?id=49499">49499</a>
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<th>Summary</th>
<td>llvm-mca for cortex-a57 gets thrown off by SIMD loads with dependencies (negative latency?)
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AArch64
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>martin@martin.st
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<th>CC</th>
<td>andrea.dibiagio@gmail.com, arnaud.degrandmaison@arm.com, llvm-bugs@lists.llvm.org, smithp352@googlemail.com, Ties.Stuij@arm.com
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<p>
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<pre>Given the following instruction series, llvm-mca seems to calculate a sensible
result:
$ cat test.S
add v0.16b, v1.16b, v2.16b
add v1.16b, v3.16b, v0.16b
add v2.16b, v3.16b, v1.16b
$ llvm-mca --mtriple=aarch64-linux-gnu --mcpu=cortex-a57 test.S
Iterations: 100
Instructions: 300
Total Cycles: 903
However if the series is preceded by a SIMD load into the registers that are
used, the total cycle count ends up reduced:
$ cat test2.S
ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0]
add v0.16b, v1.16b, v2.16b
add v1.16b, v3.16b, v0.16b
add v2.16b, v3.16b, v1.16b
$ llvm-mca --mtriple=aarch64-linux-gnu --mcpu=cortex-a57 test2.S
Iterations: 100
Instructions: 400
Total Cycles: 416
Suddenly the total cycles has dropped in half as if the load has negative
latency. If the load is into a different set of registers, it doesn't affect
the calculation in the same way:
$ cat test3.S
ld1 {v16.16b, v17.16b, v18.16b, v19.16b}, [x0]
add v0.16b, v1.16b, v2.16b
add v1.16b, v3.16b, v0.16b
add v2.16b, v3.16b, v1.16b
$ llvm-mca --mtriple=aarch64-linux-gnu --mcpu=cortex-a57 test3.S
Iterations: 100
Instructions: 400
Total Cycles: 904
This doesn't seem to happen for the A55 target though.</pre>
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